Tools for Co-Designing HPC Systems Using RISC-V As A Demonstrator

A technical paper titled “Software Development Vehicles to enable extended and early co-design: a RISC-V and HPC case of study” was published by researchers at Barcelona Supercomputing Center and FORTH. Abstract: "Prototyping HPC systems with low-to-mid technology readiness level (TRL) systems is critical for providing feedback to hardware designers, the system software team (e.g., co... » read more