HW/SW Co-Verification For Hybrid Systems


Heterogeneous SoC architectures such as Zynq have become very popular recently due to the combination of programmable logic (FPGA) and processing system (ARM) integrated into a single chip. Developing a design using such hybrid systems causes complexity in design verification stages. To help address this complexity, Aldec introduced support for QEMU for co-verification in our HES.Proto-AXI host... » read more