tag: IEDM

DTCO/STCO Create Path For Faster Yield Ramps
By Laura Peters - 12 Mar, 2024 - Comments: 0

Higher density in planar SoCs and advanced packages, coupled with more complex interactions and dependencies between various components, are permitting systematic defects to escape traditional detection methods. These issues increasingly are not detected until the chips reach high-volume manufacturing, slowing the yield ramp and bumping up costs. To combat these problems, IDMs and systems co... » read more

3D Integration Supports CIM Versatility And Accuracy
By Katherine Derbyshire - 18 Jan, 2024 - Comments: 0

Compute-in-memory (CIM) is gaining attention due to its efficiency in limiting the movement of massive volumes of data, but it's not perfect. CIM modules can help reduce the cost of computation for AI workloads, and they can learn from the highly efficient approaches taken by biological brains. When it comes to versatility, scalability, and accuracy, however, significant tradeoffs are requir... » read more

Modeling Compute In Memory With Biological Efficiency
By Katherine Derbyshire - 19 Dec, 2023 - Comments: 0

The growing popularity of generative AI, which uses natural language to help users make sense of unstructured data, is forcing sweeping changes in how compute resources are designed and deployed. In a panel discussion on artificial intelligence at last week’s IEEE Electron Device Meeting, IBM’s Nicole Saulnier described it as a major breakthrough that should allow AI tools to assist huma... » read more

Big Changes Ahead In Power Delivery, Materials, And Interconnects
By Laura Peters - 22 Mar, 2023 - Comments: 0

Part one of this forecast looked at evolving transistor architectures and lithography platforms. This report examines revolutions in interconnects and packaging. When it comes to device interconnects, it’s hard to beat copper. Its low resistivity and high reliability have served the industry exceedingly well as both on-chip interconnect and wires between chips. But in logic chips, with int... » read more

Process Innovations Enabling Next-Gen SoCs and Memories
By Laura Peters - 20 Feb, 2023 - Comments: 0

Achieving improvements in performance in advanced SoCs and packages — those used in mobile applications, data centers, and AI — will require complex and potentially costly changes in architectures, materials, and core manufacturing processes. Among the options under consideration are new compute architectures, different materials, including thinner barrier layers and those with higher th... » read more

Devices And Transistors For The Next 75 Years
By Laura Peters - 16 Feb, 2023 - Comments: 0

The 75th anniversary of the invention of the transistor sparked a lively panel discussion at IEDM, spurring debate about the future of CMOS, the role of III-V and 2D materials in future transistors, and what will be the next great memory architecture.[1] Industry veterans from the memory, logic, and research communities see high-NA EUV production, NAND flash with 1,000 layers, and hybrid bon... » read more

Ferroelectric Memories: The Middle Ground
By Katherine Derbyshire - 19 Jan, 2023 - Comments: 0

The first article in this series considered the use of ferroelectrics to improve subthreshold swing behavior in logic transistors. The prospects for ferroelectrics in logic applications are uncertain, but ferroelectric memories have clear advantages. The two most common commercial memories lie at opposite ends of a spectrum. DRAM is fast, but requires constant power to maintain its informat... » read more

The Path To Known Good Interconnects
By Laura Peters - 19 Jan, 2023 - Comments: 1

Chiplets and heterogenous integration (HI) provide a compelling way to continue delivering improvements in performance, power, area, and cost (PPAC) as Moore’s Law slows, but choosing the best way to connect these devices so they behave in consistent and predictable ways is becoming a challenge as the number of options continues to grow. More possibilities also bring more potential interac... » read more

Week In Review: Manufacturing, Test
By Karen Heyman - 09 Dec, 2022 - Comments: 2

The more than 1,400 attendees at this week’s IEDM, which celebrated the 75th anniversary of the transistor, were clearly focused on making the next 75 years of semiconductors even more remarkable than the last. Intel, Samsung, TSMC, STMicroelectronics, GlobalFoundries and imec announced breakthrough devices, materials, and even integration approaches. These included: Intel showcased adva... » read more

What’s Different About Next-Gen Transistors
By Katherine Derbyshire - 20 Oct, 2022 - Comments: 0

After nearly a decade and five major nodes, along with a slew of half-nodes, the semiconductor manufacturing industry will begin transitioning from finFETs to gate-all-around stacked nanosheet transistor architectures at the 3nm technology node. Relative to finFETs, nanosheet transistors deliver more drive current by increasing channel widths in the same circuit footprint. The gate-all-aroun... » read more

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