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Driving Toward More Rugged, Less Expensive SiC


Silicon carbide is gaining traction in the power semiconductor market, particularly in electrified vehicles, but it's still too expensive for many applications. The reasons are well understood, but until recently SiC was largely a niche technology that didn't warrant the investment. Now, as demand grows for chips that can work in high-voltage applications, SiC is getting a much closer look. ... » read more

Highly Selective Etch Rolls Out For Next-Gen Chips


Several etch vendors are starting to ship next-generation selective etch tools, paving the way for new memory and logic devices. Applied Materials was the first vendor to ship a next-gen selective etch system, sometimes called highly-selective etch, in 2016. Now, Lam Research, TEL, and others are shipping tools with highly-selective etch capabilities, in preparation for futuristic devices su... » read more

2D Semiconductors Make Progress, But Slowly


Researchers are looking at a variety of new materials at future nodes, but progress remains slow. In recent years, 2D semiconductors have emerged as a leading potential solution to the problem of channel control in highly scaled transistors. As devices shrink, the channel thickness should shrink proportionally. Otherwise, the gate capacitance won’t be large enough to control the flow of cu... » read more

Next-Gen 3D Chip/Packaging Race Begins


The first wave of chips is hitting the market using a technology called hybrid bonding, setting the stage for a new and competitive era of 3D-based chip products and advanced packages. AMD is the first vendor to unveil chips using copper hybrid bonding, an advanced die-stacking technology that enables next-generation 3D-like devices and packages. Hybrid bonding stacks and connects chips usin... » read more

Manufacturing Bits: Dec. 14


3D-SOCs At this week’s IEEE International Electron Devices Meeting (IEDM), a plethora of companies, R&D organizations and universities presented papers on the latest and greatest technologies. One of the themes at IEDM is advanced packaging, a technology enables an IC vendor to boost the performance of a chip. Advanced forms of packaging also enables new 3D-like chip architectures. Fo... » read more

Manufacturing Bits: Oct. 26


GaN finFETs, scaling GaN At the upcoming IEEE International Electron Devices Meeting (IEDM) in San Francisco, a slew of entities will present papers on the latest technologies in R&D. The event, to be held Dec. 11–15, involve papers on advanced packaging, CMOS image sensors, interconnects, transistors, power devices and other technologies. At IEDM, Intel will present a paper on a GaN-... » read more

Memory Technology: Innovations needed for continued technology scaling and enabling advanced computing systems


Abstract: "An increasing demand for data generation, storage, and intelligence generation from data is driving advances in memory technology and advanced computing applications. Memory performance is starting to define modern day computing in both mobile and server environments. There is an absolute need to continue the tremendous pace of memory technology improvements to deliver performanc... » read more

Thinner Channels With 2D Semiconductors


Moving to future nodes will require more than just smaller features. At 3/2nm and beyond, new materials are likely to be added, but which ones and exactly when will depend upon an explosion of material science research underway at universities and companies around the globe. With field-effect transistors, a voltage applied to the gate creates an electric field in the channel, bending the ban... » read more

Power Converter Chip Research Booms


Power electronics are booming, fueled by demand ranging from induction chargers for wearable and portable electronics, to charging stagings for electric vehicles. An estimated 80% of all U.S. electricity will pass through some form of power converter by 2030, said Yogesh Ramadass, director of power management at Texas Instruments' Kilby Labs. Transportation applications, in particular, deman... » read more

Breaking The 2nm Barrier


Chipmakers continue to make advancements with transistor technologies at the latest process nodes, but the interconnects within these structures are struggling to keep pace. The chip industry is working on several technologies to solve the interconnect bottleneck, but many of those solutions are still in R&D and may not appear for some time — possibly not until 2nm, which is expected t... » read more

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