Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 28 May, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back Cadence announced it has found a cost-conscience way to scale capacity for 3D electromagnetic (EM) simulations using a hybrid cloud consisting of local computing resources and cloud services from Amazon Web Service (AWS). Data stays safe on the local resources, and, if more computing resources are needed, encrypted simulation-spec... » read more

Do We Have An IC Model Crisis?

By Brian Bailey - 27 May, 2021 - Comments: 0

Models are critical for IC design. Without them, it's impossible to perform analysis, which in turn limits optimizations. Those optimizations are especially important as semiconductors become more heterogenous, more customized, and as they are integrated into larger systems, creating a need for higher-accuracy models that require massive compute power to develop. But those factors, and other... » read more

Pushing The Limits Of Hardware-Assisted Verification

By Ann Mutschler - 27 May, 2021 - Comments: 0

As semiconductor complexity continues to escalate, so does the reliance on hardware-assisted simulation, emulation, and prototyping. Since chip design first began, engineers have complained their design goals exceeded the capabilities of the tools. This is especially evident in verification and debug, which continue to dominate the design cycle. Big-iron tooling has enabled design teams to k... » read more

Scaling Simulation

By Brian Bailey - 27 May, 2021 - Comments: 1

Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

Standards, Open Source, and Tools

By Brian Bailey - 10 May, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardware engineer... » read more

Roadblocks For ML in EDA

By Brian Bailey - 28 Apr, 2021 - Comments: 1

Is EDA a suitable space for utilizing machine learning (ML)? The answer depends on a number of factors, including where exactly it is being applied, how much support there is from the industry, and whether there are demonstrable advantages. Exactly where ML will play a role has yet to be decided. Replacing existing heuristics with machine learning, for example, would require an industry-wide... » read more

New Methodologies Create New Opportunities

By Brian Bailey - 27 Apr, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss what open source verification means today and what it should evolve into, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardwa... » read more

The Verification Mindset

By Ann Mutschler - 26 Apr, 2021 - Comments: 2

The practice of semiconductor verification has changed substantially over the years, and will continue to do so. The skillset needed for functional verification 20 years ago is hardly recognizable as a verification skillset today, and the same should be expected moving forward as design and verification becomes more abstract, the boundary of what is implemented in hardware versus firmware and s... » read more

Putting Limits On What AI Systems Can Do

By Ed Sperling - 22 Apr, 2021 - Comments: 0

New techniques and approaches are starting to be applied to AI and machine learning to ensure they function within acceptable parameters, only doing what they're supposed to do. Getting AI/ML/DL systems to work has been one of the biggest leaps in technology in recent years, but understanding how to control and optimize them as they adapt isn't nearly as far along. These systems are generall... » read more

Adding Value To Open-Source RISC-V Cores With Verification

By Lee Moore - 22 Apr, 2021 - Comments: 0

By Steve Richmond (Silicon Labs), Mike Thompson (OpenHW Group), and Lee Moore (Imperas Software) Modern SoC verification has matured to the point that some are suggesting the use of the word ‘prototype’ when referring to the first silicon samples is now unnecessary. This is due in part to the commercial EDA industry, which has provided the innovation and tools used throughout the design... » read more

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Knowledge Centers
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NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

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What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

tag: Imperas Software