Week In Review: Design, Low Power

By Jesse Allen - 09 Jul, 2021 - Comments: 0

Tools Aldec extended its TySOM family of embedded prototyping boards with the introduction of TySOM-M-MPFS250, the first in a planned series to feature a Microchip PolarFire SoC FPGA MPFS250T-FCG1152 and to have dual FMC connectivity. The board contains 16Gb FPGA DDR4 x32, 16Gb MSS DDR4 x36 with ECC, eMMC, SPI Flash memory, 64 Kb EEPROM and a microSD card socket. The PolarFire SoC is a five-st... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 09 Jul, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back The IoT designer Deed designed a screenless health monitor, worn on the wrist, that uses IoT (Internet of Things) building blocks from Infineon Technologies. The Get bracelet interprets hand gestures for making payments, picking up phone calls, turning up or down audio, while it also takes health data and biometrics. The system us... » read more

Lower Power Chips: What To Watch Out For

By Ann Mutschler - 08 Jul, 2021 - Comments: 0

Low-power design in advanced nodes and advanced packaging is becoming a multi-faceted, multi-disciplinary challenge, where a long list of issues need to be solved both individually and in the context of other issues. With each new leading-edge process node, and with increasingly dense packaging, the potential for problematic interactions is growing. That, in turn, can lead to poor yield, cos... » read more

Gate Drive Solutions For CoolGaN 600 V HEMTs

By Infineon - 08 Jul, 2021 - Comments: 0

This paper explains the gate drive requirements for Infineon’s CoolGaN 600 V e-mode HEMTs. Various driving solutions are discussed, ranging from the standard RC-coupled driver to a new differential drive concept utilizing dedicated gate driver ICs. In half-bridge topologies, a hybrid configuration combining isolated and non-isolated drivers could be an exciting alternative. Practical applicat... » read more

IoT Security: Confusing And Fragmented

By Bryon Moyer - 01 Jul, 2021 - Comments: 0

Security regulations for Internet-of-Things (IoT) devices are evolving around the world, but there is no consistent set of requirements that can be applied globally — and there may never be. What exists today is a patchwork of certification labs and logos. That makes it difficult for IoT-device designers to know where to get their security blessed. Unlike in data centers, where there is a ... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 25 Jun, 2021 - Comments: 0

Automotive Cadence will be capturing design insights from Presto Engineering, an ASIC designer working on high-performance system-in-package (SiP) development for the automotive and Industrial IoT markets. Presto, which also provides semiconductor services such as test and qualification, will use Cadence’s EDA and analysis tools (Allegro X Package Designer Plus, Clarity 3D Solver, Sigrity Xt... » read more

Week In Review: Design, Low Power

By Jesse Allen - 18 Jun, 2021 - Comments: 0

Rambus is making a push for Compute Express Link (CXL) with two acquisitions and the launch of its CXL Memory Interconnect Initiative. The initiative aims to define and develop semiconductor solutions for advanced data center architectures, with initial research and development focusing on solutions to support key memory expansion and pooling use cases. CXL is an open interconnect specificat... » read more

Fan-Out Packaging Options Grow

By Mark LaPedus - 17 Jun, 2021 - Comments: 0

Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 11 Jun, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back Xilinx introduced its Versal AI Edge series of adaptive SoCs, or adaptive compute acceleration platforms (ACAPs), that can be manage AI-ML workloads in edge applications. The chip is designed for flexible, low latency, edge applications where algorithms may need updating. The software programmable chips have an AI Engine-ML featur... » read more

Power, Performance — Avionics Designers Want It All

By Heidi Elliott - 10 Jun, 2021 - Comments: 0

Not long ago, the prevailing philosophy among chip designers for aviation systems could be summed up as, “I feel the need — the need for speed.” Today, aviation’s top guns have pulled back on the throttle a bit. There’s a more nuanced discussion balancing the need for performance versus power, with other factors coming into consideration such as safety, security certifications and ove... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Infineon Technologies

Week In Review: Design, Low Power

Week In Review: Auto, Security, Pervasive Computing

Lower Power Chips: What To Watch Out For

Gate Drive Solutions For CoolGaN 600 V HEMTs

IoT Security: Confusing And Fragmented

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Design, Low Power

Fan-Out Packaging Options Grow

Week In Review: Auto, Security, Pervasive Computing

Power, Performance — Avionics Designers Want It All