Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan The U.S. Department of Defense (DOD) announced $238 million in awards toward establishing eight regional innovation hubs under the CHIPS and Science Act. The hubs aim to accelerate hardware prototyping and "lab-to-fab" transition of semiconductor technologies for secure edge/IoT, 5G/6G, AI hardware, quantum technology, electromagnetic warfare, and ... » read more

Building Better Bridges In Advanced Packaging


The increasing challenges and rising cost of logic scaling, along with demands for an increasing number of features, are pushing more companies into advanced packaging. And while that opens up a slew of new options, it also is causing widespread confusion over what works best for different processes and technologies. At its core, advanced packaging depends on reliable interconnects, well-def... » read more

Chip Industry Week In Review


By Gregory Haley, Jesse Allen, and Liz Allan TSMC told equipment vendors to delay deliveries of the most advanced tools due to uncertain demand, according to Reuters. The news drove down stock prices of all the major equipment providers. On the other hand, TSMC said advanced packaging shortages will constrain AI chip shipments for the next 18 months, according to NikkeiAsia. The United St... » read more

Sweeping Changes For Leading-Edge Chip Architectures


Chipmakers are utilizing both evolutionary and revolutionary technologies to achieve orders of magnitude improvements in performance at the same or lower power, signaling a fundamental shift from manufacturing-driven designs to those driven by semiconductor architects. In the past, most chips contained one or two leading-edge technologies, mostly to keep pace with the expected improvements i... » read more

Week In Review: Design, Low Power


Design & IP Arm launched the Neoverse Compute Subsystems (CSS), pre-integrated and validated configurations of Arm Neoverse platform IP, at this week's Hot Chips conference. CSS helps streamline SoC designs for data centers and is optimized for an advanced 5nm process. The first generation of CSS (Neoverse CSS N2) is based on Arm’s Neoverse N2 platform. Core count is configurable (24 to ... » read more

Performance & Efficiency Cores For Servers


HotChips 2023 was held August 27-29, 2023 at Stanford University in California and was the first in-person version of the conference in 4 years. The conference was held in a hybrid format that had over 500 participants in-person and over 1,000 attending virtually online. Topics covered a broad range of advancements in computing, connectivity, and computer architecture. Both AMD and Intel gav... » read more

Week In Review: Design, Low Power


Arm filed its registration statement for a highly anticipated IPO. Chip industry heavyweights Apple, Samsung, NVIDIA, and Intel are all expected to invest. Find the SEC filing here. Taiwan’s National Science and Technology Council (NSTC) laid out a 10-year initiative to bolster its IC design market share to 40% worldwide by 2033, with the first year’s budget of US $376 million. The sh... » read more

Week In Review: Manufacturing, Test


Intel aims to quadruple capacity for its most advanced chip packaging services by 2025, including with a new facility in Malaysia, per Nikkei Asia. Huawei is building a collection of secret semiconductor fabrication facilities across China to let the company skirt U.S. sanctions, SIA warned in a presentation seen by Bloomberg. It’s acquired at least two existing plants and is building at l... » read more

Side-Channel Security Analysis of Intel Optane Persistent Memory


A new technical paper titled "Side-Channel Attacks on Optane Persistent Memory" was published by researchers at University of Virginia, Cornell University, and Graz University of Technology. This paper was included at the recent 32nd USENIX Security Symposium. Abstract: "There is a constant evolution of technology for cloud environments, including the development of new memory storage tech... » read more

Modeling and Testing Microarchitectural Leakage of CPU Exceptions (Microsoft, Vrije Universiteit Amsterdam)


A new technical paper titled "Speculation at Fault: Modeling and Testing Microarchitectural Leakage of CPU Exceptions" was published by researchers at Microsoft and Vrije Universiteit Amsterdam. This paper was included at the recent 32nd USENIX Security Symposium. Abstract: "Microarchitectural leakage models provide effective tools to prevent vulnerabilities such as Spectre and Meltdown vi... » read more

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