Interconnect Prominence In Fail-Operational Architectures


When we in the semiconductor world think about safety, we think about ISO 26262, FMEDA and safety mechanisms like redundancy, ECC and lock-step operation. Once we have that covered, any other aspect of safety is somebody else’s problem, right? Sadly no, for us at least. As we push towards higher levels of autonomy, SAE levels 3 and above, we’re integrating more functionality into our SoCs, ... » read more

Memory Architectures In AI: One Size Doesn’t Fit All


In the world of regular computing, we are used to certain ways of architecting for memory access to meet latency, bandwidth and power goals. These have evolved over many years to give us the multiple layers of caching and hardware cache-coherency management schemes which are now so familiar. Machine learning (ML) has introduced new complications in this area for multiple reasons. AI/ML chips ca... » read more

Week In Review: Design, Low Power


M&A Nvidia will acquire Mellanox for $6.9 billion in cash, the largest deal in the chipmaker's history. Traditionally a PC GPU company, Nvidia has made a push into high-performance computing, particularly for AI workloads. Founded in 1999, Israel-based Mellanox focuses on end-to-end Ethernet and InfiniBand interconnect solutions and services for servers and storage. According to Nvidia, Me... » read more

The Race To Multi-Domain SoCs


K. Charles Janac, president and CEO of Arteris IP, sat down with Semiconductor Engineering to discuss the impact of automotive and AI on chip design. What follows are excerpts of that conversation. SE: What do you see as the biggest changes over the next 12 to 24 months? Janac: There are segments of the semiconductor market that are shrinking, such as DTV and simple IoT. Others are going ... » read more

Keeping Up Power And Performance With Cobalt


Chip designers require simultaneous improvements in “PPAC”: power, performance and area/cost (Fig. 1). Achieving these improvements is becoming increasingly difficult as classic Moore's Law scaling slows. What's needed is a new playbook for the industry consisting of new materials, new architectures, new 3D structures within the chip, new methods to shrink feature geometries, and advanced p... » read more

Data Transfer Without Energy Loss


SEMI met with Erez Halahmi, vice president at 0eC SA, to discuss a new way to transfer information not only between chips but also between servers to reduce power consumption while boosting performance. The two spoke ahead of his presentation at the 3D & Systems Summit, 28-30 January, 2019, in Dresden, Germany. To register for the event, please click here. SEMI: What is Zero energy co... » read more

Not Enough Respect For SoC Interconnect


For high-volume system-on-chip (SoC) applications—artificial intelligence (AI), automotive, mobility, solid state drives and more—effective interconnect technology can generate hundreds of millions of dollars in revenue due to smaller chip area, better functionality and faster delivery of SoC platforms. State-of-the-art interconnect technology also allows chip designers to create SoC deriva... » read more

Neural Nets In ADAS And Autonomous Driving SoC Designs


Automotive electronics has ushered in a new wave of semiconductor design innovation and one new technology gaining a lot of attention is neural networks (NNs). Advanced driving assistance systems (ADAS) and autonomous car designs now rely on NNs to meet the real-time requirements of complex object-recognition algorithms. The concept of NNs has been around since World War II, promising a futu... » read more

How SoC Interconnect Enables Flexible Architecture For ADAS And Autonomous Car Designs


When the mobile phone era saw its fastest growth, the design teams that were the most innovative were able to introduce game-changing features before anyone else. Those companies also had the most configurable interconnect IP, allowing them to adapt to quickly changing market needs faster than their competition. Now, nearly a decade later, when autonomous driving is quickly moving into the m... » read more

New Interconnect Makes eFPGA Dense And Portable


FPGAs were invented over 30 years ago. Today they are much bigger and faster, but their basic architecture remains unchanged: logic blocks formed around LUTs (look-up-tables) in a sea of mesh (x/y grid) interconnect with a matrix of switches at every “intersection.” One FPGA company executive once said they don’t really sell programmable logic, they sell programmable interconnect, beca... » read more

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