Why Are Automotive SoC Designers Turning To PCI Express 6.0?

Just over two decades ago, the introduction of PCI Express 1.0 marked the industry’s transition from then-ubiquitous parallel to serial interfaces. Back in 2002, the potential of “PCIe” in automotive applications was unforeseen – given the then-current state of in-vehicle computation and PCIe’s primary focus on desktop and data center use. Today, however, with the advent of connected ... » read more

Nascent Chiplet Tech Gaining Attention In Defense and Commercial Industries

The economic benefits derived from Moore's Law have changed, and not for the better. This shift – especially on the manufacturing side of system-on-chip (SoC) devices, has both the defense and commercial customers in the semiconductor industry wondering what will come next. One way to extend Moore's Law's cost, feature, and size benefits is with multi-chip technology, now commonly known as... » read more

AI Drives Need For Optical Interconnects In Data Centers

An explosion of data, driven by more sensors everywhere and the inclusion of AI/ML in just about everything, is ratcheting up the pressure on data centers to leverage optical interconnects to speed up data throughput and reduce latency. Optical communication has been in use for several decades, starting with long-haul communications, and evolving from there to connect external storage to ser... » read more

Is RISC-V Ready For Supercomputing?

RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, appear to be garnering support for an entirely different type of role — high-performance computing. This is still at the discussion stage. Questions remain about the software ecosystem, or whether the chips, boards, and systems are reliable enough. And there are both business and t... » read more

Optimizing NoC-Based Designs

Semiconductor development is currently in a phase of rapid evolution driven by the combination of new technologies and methodologies. The technique of combining multiple functions into systems-on-chips (SoCs) is continuing to grow in complexity. Rapid advancement in new technologies for market segments like data centers, robotics, ADAS and artificial intelligence/machine learning (AI/ML) are re... » read more

Choosing The Right Server Interface Architectures For High Performance Computing

The largest bulk and cost of a modern high-performance computing (HPC) installation involves the acquisition or provisioning of many identical systems, interconnected by one or more networks, typically Ethernet and/or InfiniBand. Most HPC experts know that there are many choices between different server manufacturers and the options of form factor, CPU, RAM configuration, out of band management... » read more

UCIe: Marketing Ruins It Again

You may have seen the press release and articles recently about a new standard called UCIe. It stands for Universal Chiplet Interconnect Express. The standard is a great idea and will certainly help the market for chiplet-based designs to advance. But the name — Argggh. More on that later. First, let's talk about what it is. You may notice the name looks similar to PCIe (Peripheral Compone... » read more

A review of interconnect materials used in emerging memory device packaging: first- and second-level interconnect materials

Abstract "The main motivation of this review is to study the evolution of first and second level of interconnect materials used in memory device semiconductor packaging. Evolutions of bonding wires from gold (Au) to silver (Ag) or copper (Cu) have been reported and studied in previous literatures for low-cost solution, but Au wire still gives highest rating in terms of the performance of tempe... » read more

NoC Experiences From The Trenches

Network-on-chip (NoC) interconnect as an alternative to traditional crossbars is already well-proven, but there are still plenty of design teams on the cusp of a transition or who maybe do not yet see a need for a change. As with a switch to any new technology, the first hurdles are often simply misconceptions. When new users first evaluate any new technology, they often make the mistake of att... » read more

Advancing To The 3nm Node And Beyond: Technology, Challenges And Solutions

It seems like yesterday that finFETs were the answer to device scaling limitations imposed by shrinking gate lengths and required electrostatics. The introduction of finFETs began at the 22nm node and has continued through the 7nm node. Beyond 7nm, it looks like nanosheet device structures will be used for at least the 5nm and probably the 3nm nodes. The nanosheet device structure is the brainc... » read more

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