Inside FD-SOI And Scaling

By Mark LaPedus - 15 Jun, 2017 - Comments: 5

Gary Patton, chief technology officer at [getentity id="22819" comment="GlobalFoundries"], sat down with Semiconductor Engineering to discuss FD-SOI, IC scaling, process technology and other topics. What follows are excerpts of that conversation. SE: In logic, GlobalFoundries is shipping 14nm finFETs with 7nm in the works. The company is also readying 22nm FD-SOI technology with 12nm FD-SOI ... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 02 Dec, 2016 - Comments: 0

Manufacturing There are more changes at SEMI. SEMI has named David Anderson as president of the SEMI Americas region. Most recently, Anderson was chief executive and chairman of Novati, a specialty manufacturing fab. He replaces Karen Savala, who was president of the SEMI Americas region for six years. In an e-mail, Savala confirmed she left SEMI in October. Meanwhile, in October, SEMI an... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 30 Sep, 2016 - Comments: 0

Chipmakers In 2016, growth in the pure-play foundry business will be driven by leading-edge processes, according to IC Insights. In fact, the increase in pure-play foundry sales this year is forecast to be almost entirely due to processes at » read more

GlobalFoundries Rolls Out 12nm FD-SOI Process

By Jeff Dorsch - 08 Sep, 2016 - Comments: 0

GlobalFoundries uncorked its 12FDX platform, incorporating a 12nm fully-depleted silicon-on-insulator process technology. The foundry’s Fab 1 in Dresden, Germany, will support customer development with the 12nm process, with product tape-outs scheduled for the first six months of 2019. The 12FDX technology follows the company’s 22FDX platform involving a 22-nanometer process. The foundr... » read more

To 7nm And Beyond

By Ed Sperling - 21 Jul, 2016 - Comments: 4

Gary Patton, chief technology officer at [getentity id="22819" comment="GlobalFoundries"], and Thomas Caulfield, senior vice president and general manager of Fab 8, sat down with Semiconductor Engineering to discuss future directions in technology, including the next rev of FD-SOI, the future of Moore’s Law, and how some very public challenges will likely unfold. SE: What do you see as the... » read more

Foundries Expand Their Scope

By Ed Sperling - 21 Apr, 2016 - Comments: 0

By Ed Sperling & Mark LaPedus Major foundries are stepping up their offerings across a wide swath of technology nodes, specialty processes and advanced packaging—a recognition that end markets are fragmenting and that the path forward includes a mix of new and established processes. As the smart phone market flattens, there is no single "next big thing" to drive volume at the most ... » read more

Brite Semiconductor: Design Services

By Ed Sperling - 20 Apr, 2015 - Comments: 0

These days it's increasingly common for large commercial foundries to have a design services counterpart—TSMC has GlobalUnichip. GlobalFoundries has an entire ecosystem as well as a dedicated partner, Invecas. And China's SMIC has Brite Semiconductor. Brite was founded in 2008 by Open-Silicon as a way to tap the Chinese market, but the startup has taken some twists since then. It now is un... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 07 Nov, 2014 - Comments: 0

China’s Jiangsu Changjiang Electronics Technology (JCET) has made a bid to acquire STATS ChipPAC for $780 million, according to reports. This year’s top-20 chip ranking includes two pure-play foundries--TSMC and UMC--and six fabless companies, according to IC Insights. GlobalFoundries is forecast to be replaced in this year’s top 20 ranking by fabless IC supplier Nvidia, according to t... » read more

Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Invecas

Inside FD-SOI And Scaling

The Week In Review: Manufacturing

The Week In Review: Manufacturing

GlobalFoundries Rolls Out 12nm FD-SOI Process

To 7nm And Beyond

Foundries Expand Their Scope

Brite Semiconductor: Design Services

The Week In Review: Manufacturing