tag: IP quality

Three Key Aspects Of IP Quality
By Tom Anderson - 02 Dec, 2021 - Comments: 0

It’s no secret that today’s huge system-on-chip (SoC) projects require massive amounts of design reuse. No team, no matter how talented, can design a billion or more gates from scratch. They use extensive borrowing of RTL code from previous and related projects, plus hundreds of thousands of instantiated IP blocks from internal libraries, open-source repositories, development partners, and ... » read more

Challenges In IP Reuse
By Ed Sperling - 09 Dec, 2019 - Comments: 0

Jeff Markham, software architect at ClioSoft, explains why IP reuse is so important in advanced process node SoC chip designs, what companies need to keep track of when working with third-party IP, and how it needs to be characterized. » read more

Why IP Quality Is So Difficult To Determine
By Ann Mutschler - 30 May, 2019 - Comments: 0

Differentiating good IP from mediocre or bad IP is getting more difficult, in part because it depends up on how and where it is used and in part because even the best IP may work better in one system than another—even in chips developed by the same vendor. This has been one of the challenges with IP over the years. In many cases, IP is poorly characterized, regardless of whether that IP wa... » read more

Experts At The Table: How To Improve IP Quality
By Ann Mutschler - 11 Oct, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss the best ways to improve the quality of design IP with Piyush Sancheti, vice president of product marketing at Atrenta; Chris Rowen, Cadence Fellow and former CTO at Tensilica; Gene Matter, senior applications manager at Docea Power; Warren Savage, president and CEO of IPextreme; and Dan Kochpatcharin, deputy director of IP portfolio marketing at TS... » read more

Experts At The Table: How To Improve IP Quality
By Ann Mutschler - 04 Oct, 2013 - Comments: 0

By Ann Steffora Mutschler Semiconductor Engineering sat down to discuss the best ways to improve the quality of design IP with Piyush Sancheti, vice president of product marketing at Atrenta; Chris Rowen, Cadence Fellow and former CTO at Tensilica; Gene Matter, senior applications manager at Docea Power; Warren Savage, president and CEO of IPextreme; and Dan Kochpatcharin, deputy director of ... » read more

Experts At The Table: How To Improve IP Quality
By Ann Mutschler - 26 Sep, 2013 - Comments: 0

By Ann Steffora Mutschler Semiconductor Engineering sat down to discuss the best ways to improve the quality of design IP with Piyush Sancheti, vice president of product marketing at Atrenta; Chris Rowen, Cadence Fellow and former CTO at Tensilica; Gene Matter, senior applications manager at Docea Power; Warren Savage, president and CEO of IPextreme; and Dan Kochpatcharin, deputy director of I... » read more

Experts At The Table: Next-Generation IP Landscape
By Ann Mutschler - 13 Sep, 2013 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss predictions about the next generation design IP landscape with Robert Aitken, R&D fellow at ARM; Laurent Moll, chief technical officer at Arteris; Susan Peterson, group director, product marketing for verification IP & memory models in the system & software realization group at Cadence; and John Koeter, vice preside... » read more

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