tag: IP

Why Every Design IP Needs A Complete QA Methodology
By WeiLii Tan - 22 Sep, 2022 - Comments: 0

Design IP is a key contributor to innovation in the semiconductor industry today. As the complexity and scale of silicon designs increase, so does design and verification time. Design IP enables modularization and re-use of design components, so that designers can leverage already-existing components as a baseline to accelerate design schedules. Therefore, it is not surprising that the usage of... » read more

New Data Management Challenges
By Ann Mutschler - 13 Sep, 2022 - Comments: 0

An explosion in semiconductor design and manufacturing data, and the expanding use of chips in safety-critical and mission-critical applications, is prompting chipmakers to collect and manage that data more effectively in order to improve overall performance and reliability. This collection of data reveals a number of challenges with no simple solutions. Data may be siloed and inconsistent, ... » read more

Boosting Data Management System Performance
By Ed Sperling - 07 Sep, 2022 - Comments: 0

Marios Karatzias, application engineer at ClioSoft, talks with Semiconductor Engineering about the increasing use and re-use of IP in designs, how to best keep track of that IP, and how to optimize the performance of the data management system to deal with IP in heterogeneous chips. This is particularly important in automotive and industrial applications, where a specific version of IP may have... » read more

Building Trust Through Certification Of Security Solutions
By Stuart Kincaid - 04 Aug, 2022 - Comments: 0

Certification is all around us in our daily lives. When it comes to making decisions, we look for certain labels, stamps, and symbols indicating that products and services have been assessed or tested. If you are buying a new car, you may review NCAP (New Car Assessment Program) test results. If you are getting electrical work done at your home, you will choose a certified professional. And if ... » read more

More Than Random: Achieving Systematic ASIL D ISO 26262 Compliance For Automotive SoCs
By Ron DiGiuseppe - 04 Aug, 2022 - Comments: 0

Automakers are upgrading vehicle autonomy levels from Level2 Advanced Driving Assistance Systems (ADAS) to Level 2+ and Level 3 and evolving to full Highly Automated Driving (HAD) Level 4 and Level 5 with new safety critical applications. The new applications such as automatic emergency braking, lane keep aid, traffic sign recognition, surround view, drowsiness monitoring, and others improve sa... » read more

Customizing Processors
By Brian Bailey - 28 Jul, 2022 - Comments: 1

The design, verification, and implementation of a processor is the core competence of some companies, but others just want to whip up a small processor as quickly and cheaply as possible. What tools and options exist? Processors range from very small, simple cores that are deeply embedded into products to those operating at the highest possible clock speeds and throughputs in data centers. I... » read more

Security Risks Widen With Commercial Chiplets
By Ed Sperling - 07 Jul, 2022 - Comments: 0

The commercialization of chiplets is expected to increase the number and breadth of attack surfaces in electronic systems, making it harder to keep track of all the hardened IP jammed into a package and to verify its authenticity and robustness against hackers. Until now this has been largely a non-issue, because the only companies using chiplets today — AMD, Intel, and Marvell — interna... » read more

Time For FMEDA Reuse?
By Stefano Lorenzini - 07 Jul, 2022 - Comments: 0

How do designers quantify safety in electronic systems? Through one or more tables called Failure Modes, Effects and Diagnostic Analysis – FMEDA. In fact, an FMEDA does not have to be a table; it could be manifested in scripts or some other form, but a table is the easiest way to think of this information. Think of an FMEDA for an IP, as the concept extends easily to a system-on-chip (SoC). T... » read more

EDA Gaps At The Leading Edge
By Ed Sperling - 29 Jun, 2022 - Comments: 1

Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

A New Breed Of EDA Required
By Brian Bailey - 23 Jun, 2022 - Comments: 1

While doing research for one of my stories this month, a couple of people basically said that applying methodologies of the past to the designs of today can be problematic because there are fundamental differences in the architectures and workloads. While I completely agree, I don't think these statements go far enough. Designs of today generally have one of everything — one CPU, one accel... » read more

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