tag: IP

Design, Test & Repair Methodology For FinFET-Based Memories
By Synopsys - 11 Nov, 2015 - Comments: 0

Like any IP block, memories need to be tested. But unlike many other IP blocks, memory test is not as simple as pass/fail. The advent of FinFET-based memories presents new memory test challenges. This white paper covers: The new design complexities, defect coverage and yield challenges presented by FinFET-based memories. How to synthesize test algorithms for detection and diagnosis of Fin... » read more

UltraSoC: Debug IP
By Ed Sperling - 03 Nov, 2015 - Comments: 0

The background noise across the engineering community is rising with the growing complexity of SoCs. While the big news several years ago was the introduction of chips with 1 billion transistors, that's no longer making headlines. There are now well over 1 billion transistors in advanced SoCs and more than 100 IP blocks. Even abstractions are beginning to break down (see related story). Ent... » read more

Hybrid Emulation Gets More Hybrid
By Ed Sperling - 29 Oct, 2015 - Comments: 0

Rising chip complexity is creating a booming emulation business, as chipmakers working at advanced nodes turn to bigger iron to get chips out the door on time. What started as a "shift lift"—doing more things earlier in the design cycle—is evolving into a more complex mix of hardware-accelerated verification for both hardware and software. There are even some new forays into power explor... » read more

Top 5 Reasons The SoC Interconnect Matters
By Kurt Shuler - 29 Oct, 2015 - Comments: 0

The on-chip interconnect is the one area of SoC design that still does not receive the priority that it deserves. It’s like Rodney Dangerfield: It gets no respect. However, that is changing because of rising chip complexity, smaller process dimensions, and acknowledgement of the fact that in a world where design teams commercially license most of the chip’s critical semiconductor IP (like C... » read more

Will The Chip Work?
By Ed Sperling - 26 Oct, 2015 - Comments: 0

As the number of possible issues mount for integrating IP into complex chips, so does the focus on solving these issues. What becomes quickly apparent to anyone integrating multiple IP blocks is that one size doesn't fit all, either from an IP or a tools standpoint. There is no single solution because there is no single way of putting IP together. Each architecture is unique, and each brings... » read more

ARM Buys Carbon
By Brian Bailey - 20 Oct, 2015 - Comments: 3

ARM acquired Carbon Design Systems and its staff for an undisclosed amount of money, adding virtual prototyping capabilities for ARM cores. The deal is the latest in an onslaught of mergers and acquisitions that have racked the semiconductor industry over the past 18 months, propelled by low interest rates and relatively low valuations of target companies. For ARM, this deal solves a growing... » read more

Will The Chip Work?
By Ed Sperling - 19 Oct, 2015 - Comments: 1

IP is getting better, but the challenges of integrating it are getting worse. As the number of IP blocks in SoCs increases at each new process node, so does the difficulty of making them all work together. In some cases, this can mean extra code and a slight performance hit on power and performance. In other cases, it may require more drastic measures, ranging from a re-spin to a new archite... » read more

Smart Lighting Application Using ARM NanoService Solution
By Arm - 14 Oct, 2015 - Comments: 0

The NanoService solution leverages the power of the Web architecture for developing and deploying smart lighting systems efficiently and securely. The NanoService solution consists of software for devices (endpoints in an M2M or Internet of Things deployment), backend servers and Web applications that together form an end-to-end platform. The NanoService solution can be applied to virtually ... » read more

EDA, IP Numbers Up
By Ed Sperling - 28 Sep, 2015 - Comments: 0

EDA and IP numbers increased another 8.5% in Q2, with all regions but Japan showing positive growth. Total revenue was $1.91 billion for the quarter, up from $1.76 billion in Q2 of 2014. The largest category, computer-aided engineering, was $657.2 million for the quarter, up 9.6% compared with the same period last year. IC physical design was $379.2 million, up 6% year over year, and IP was ... » read more

Is The 2.5D Supply Chain Ready?
By Ed Sperling - 28 Sep, 2015 - Comments: 0

A handful of big semiconductor companies began taking the wraps off 2.5D and fan-out packaging plans in the past couple of weeks, setting the stage for the first major shift away from Moore's Law in 50 years. Those moves coincide with reports of commercial [getkc id="82" kc_name="2.5D"] chips from chip assemblers and foundries that are now under development. There have been indications for... » read more

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