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Study Of Bondable Laser Release Material Using 355nm Energy To Facilitate RDL-First And Die-First Fan-Out Wafer-Level Packaging (FOWLP)


A thorough evaluation on selecting a bondable laser release material for redistribution layer (RDL)-first and die-first fan-out wafer-level packaging (FOWLP) is presented in this article. Four laser release materials were identified based on their absorption coefficient at 355 nm. In addition, all four of these materials possess thermal stability above 350 °C and pull-off adhesion on a Ti/Cu l... » read more

Week In Review: Manufacturing, Test


Fab tools A fire broke out this week within ASML’s factory in Berlin, Germany. The fire was quickly extinguished and no one was injured during this incident. The factory manufactures components for ASML’s lithography systems, including wafer tables and clamps, reticle chucks and mirror blocks. The fire took place on Jan. 3. On Jan. 7, ASML provided an update. "The manufacturing of DUV c... » read more

Week In Review: Manufacturing, Test


Government policy Hoping to resolve the ongoing worldwide chip shortage situation, the U.S. Department of Commerce late last month launched a “request for information (RFI)” initiative, which involved sending questionnaires to various semiconductor companies. The U.S. government is asking all parts of the supply chain – producers, consumers, and intermediaries – to voluntarily share in... » read more

Week In Review: Manufacturing, Test


Packaging and test Advantest and PDF Solutions have launched their first jointly developed offering since forming a partnership in 2020. The new product is called the Advantest Cloud Solutions Dynamic Parametric Test (ACS DPT) solution. It integrates PDF Solutions’ Exensio portfolio of data analytics with Advantest’s V93000 Parametric Test System. The ACS DPT solution is designed to op... » read more

Week In Review: Design, Low Power


MoSys, a provider of SRAM solutions and networking accelerators, and Peraso Technologies, a provider of 5G mmWave devices, are merging. Stockholders of Peraso are expected to hold a 61% equity interest in the combined company, with the remaining 39% equity interest to be retained by the stockholders of MoSys. Peraso CEO Ronald Glibbery said, "By joining with MoSys, we believe we can deliver a b... » read more

Industry Pushes For Fab Tool Security Standards


The semiconductor industry is developing new cybersecurity standards for fab equipment in an effort to protect systems from potential cyberattacks, viruses, and IP theft. Two new standards are in the works, which are being formulated under the auspices of the SEMI trade group with leadership from chipmakers and others. Led by Intel and Cimetrix, the first standard deals with malware-free equ... » read more

Semicon West Day One/Two


For years, the semiconductor and equipment industry has congregated at the annual Semicon West trade show in San Francisco. It’s an event to get an update on the latest equipment, test and packaging technologies. It’s also a good way to meet with people who you haven’t seen in a year, if not longer. It’s a great way to get a pulse on the industry. Needless to say, Semicon is a vir... » read more

Manufacturing Bits: June 4


Chiplet printer A number of companies, R&D organizations and universities separately presented a slew of papers and technologies at the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas. It’s difficult to write about all of the papers at ECTC. But one paper that stood out is a prototype chiplet micro-assembly printer developed by the Palo Alto Research Cente... » read more

The Week In Review: Design


IP Cryptographic flaws have been discovered in the IEEE P1735 standard for encrypting IP and managing access rights. A team from the University of Florida found "a surprising number of cryptographic mistakes in the standard. In the most egregious cases, these mistakes enable attack vectors that allow us to recover the entire underlying plaintext IP." The researchers warn that an adversary coul... » read more

Cheaper Fan-Outs Ahead


Packaging houses continue to ramp up fan-out wafer-level packages in the market, but customers want lower cost fan-out products for a broader range of applications, such as consumer, RF and smartphones. So in R&D, the industry for some time has been developing next-generation fan-out using a panel-level format, a technology that could potentially lower the cost of fan-out. But there are ... » read more

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