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Week In Review: Design, Low Power

MoSys and Peraso merger; AI SoC development; MIPI C-PHY/D-PHY IP on TSMC N5; GF 22FDX certifications.

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MoSys, a provider of SRAM solutions and networking accelerators, and Peraso Technologies, a provider of 5G mmWave devices, are merging. Stockholders of Peraso are expected to hold a 61% equity interest in the combined company, with the remaining 39% equity interest to be retained by the stockholders of MoSys. Peraso CEO Ronald Glibbery said, “By joining with MoSys, we believe we can deliver a broader set of solutions to our combined customer base, using complementary technologies to address the networking and communication needs of our customers from the edge to the core and into the cloud.” Peraso will be the name of the company going forward, trading on Nasdaq under the new ticker PRSO. The deal is expected to close in the fourth quarter of 2021.

Tools
GlobalFoundries qualified Cadence’s Pegasus Verification System for its 12LP/12LP+ and 22FDX technologies. GF-qualified rule decks are also available to for customers designing and taping out devices for hyperscale, aerospace, 5G communications, consumer, and automotive applications.

GlobalFoundries qualified two Synopsys reference flows for its 22FDX process. One flow targets 5G mmWave, edge AI, and IoT design on Amazon AWS, while the other targets ASIL D-compliant design components for automotive applications.

GlobalFoundries certified Siemens’ Aprisa place-and-route solution for GF’s 22FDX platform. As part of the certification, the companies collaborated to incorporate Aprisa enablement technology into GF’s PDKs.

Rockwell Automation’s latest release of Studio 5000 Simulation Interface connects with Ansys Twin Builder, allowing automation and process engineers to leverage simulation-based digital twins. The connection enables users to create and test designs in a virtual space and test process changes before being implemented in the field.

Synopsys announced that several leading semiconductor companies including Dialog Semiconductor, TDK-Micronas, ST Microelectronics, and AMD adopted its PrimeSim Reliability Analysis solution that aims to unify foundry-certified reliability analysis technologies for analog, mixed-signal, and full-custom designs with reliability assessment for early life, normal life and end-of-life failures.

IP
Cadence debuted its Tensilica AI Platform for accelerating AI SoC development, including three supporting product families optimized for varying data and on-device AI requirements. Targeting intelligent sensor, IoT audio/vision, mobile vision/voice AI, and ADAS applications, the base platform includes Tensilica HiFi DSPs for audio/voice, Vision DSPs, and ConnX DSPs for radar/lidar and communications, combined with AI ISA extensions. The next tier includes the Tensilica NNE 110 AI engine, which scales from 64 to 256 GOPS and provides concurrent signal processing and efficient inferencing, while the high-end tier includes the entire Tensilica NNA 1xx AI accelerator family with accelerators scaling up to 32 TOPS.

Mixel’s MIPI C-PHY/D-PHY Combo IP is now available on TSMC’s N5 process. The MIPI C-PHY IP supports the v2.0 specification, and the MIPI D-PHY IP supports the MIPI D-PHY v2.5 specification. The MIPI C-PHY IP supports a speed of 4.5 Gsps per trio, an equivalent data rate of 10.26 Gbps/trio, and in MIPI D-PHY mode, the IP supports speeds up to 4.5 Gbps per lane. With up to three trios in C-PHY and up to four lanes in D-PHY, the combo IP reaches an aggregate bandwidth of 30.78 Gbps and 18Gbps in their respective modes. Multiple combinations of the combo IP are available, including area optimized transmitters or receivers, supporting either the MIPI Camera Serial Interface 2 (CSI-2) or MIPI Display Serial Interface 2 (DSI-2) as well as a universal version of the IP which supports all configurations.

Automotive
Arm is supporting software-defined automotive with a new software architecture and open-source reference implementation, Scalable Open Architecture for Embedded Edge (SOAFEE). SOAFEE aims to enable cloud concepts like container orchestration with automotive functional safety and in real-time. Arm also announced two new reference hardware platforms aimed at automotive workload exploration and testing on high-performance Arm-based silicon ahead of commercialization, particularly targeting applications such as cockpit, ADAS, powertrain, and autonomous driving.

NSITEXE said it received ISO 26262 ASIL D certification of its RISC-V based DR1000C parallel processor IP with vector extension two months ahead of schedule by using the Synopsys Z01X fault simulation solution.

Mobile & wireless
MediaTek announced its Kompanio 900T mobile chipset for tablets, notebooks, and other devices. Built on a 6nm process, it integrates an octa-core CPU architecture with two Arm Cortex-A78 ultra-performance cores and six Arm Cortex-A55 power-efficient cores, plus an Arm Mali-G68 GPU and MediaTek APU AI processor. It includes a 5G modem and supports LPDDR5 memory, UFS 3.1 storage, 2×2 MIMO Wi-Fi 6, and Bluetooth 5.2.

Infineon received Arm Platform Security Architecture (PSA) Level 2 certification for the PSoC 64 microcontrollers (MCUs) standard secure family of devices. The Level 2 certification includes a laboratory evaluation of the PSA Root of Trust to provide evidence that devices can protect against scalable software attacks.

Taiwan’s Industrial Technology Research Institute (ITRI) and Arm formed a new initiative to support new chip companies. The IC Design Platform for Startups will provide access to IP through Arm Flexible Access for Startups and chip design support from ITRI including system design and optimization, chip integration solutions, and advanced manufacturing processes.

HPC
Flex Power Modules used Infineon’s Zero voltage switching Switched capacitor Converter (ZSC) technology in a non-isolated switched capacitor intermediate bus converter (IBC) targeted to provide high power density for data centers that reaches efficiency of over 98% at half load and can deliver power up to 875 W continuous in a compact package.

Memory & storage
SmartDV debuted a portfolio of memory design and verification solutions, including memory models, verification IP, and design IP.

Kioxia is now sampling its FL6 Series enterprise NVMe storage class memory (SCM) SSDs. The company said the dual-port and PCIe 4.0-compliant FL6 Series SSDs bridge the gap between DRAM and TLC-based drives, making them suited to demanding and mixed workloads as well as latency-sensitive use cases such as caching layer, tiering, and write logging.

People
Synopsys has appointed Sassine Ghazi as president and chief operating officer. Ghazi became COO in August 2020, joining Synopsys in 1998 and serving in numerous roles including general manager of the Design Group. Previous president Chi-Foon Chan will transition from his co-CEO position over the first half of fiscal 2022, after which he will continue to support the company in a new role that has yet to be announced. Chan was appointed co-CEO in 2012 after serving as president and COO for 14 years.

Upcoming Events

ARC Processor Summit 2021, Sept. 21-22

Ansys IDEAS Digital Forum, Sept. 22-23

For a more complete list of events, click here.



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