tag: Keysight

Blog Review: Jan. 8
By Jesse Allen - 08 Jan, 2025 - Comments: 0

Cadence's Igor Krause unravels the different Orthogonal Header Content (OHC) types in PCIe 6.0, which work as an extra header for the Transaction Layer Packet (TLP) that incorporates information fields that are needed depending on the TLP type. Siemens EDA's Yunhong Min considers how AI and machine learning are reshaping functional verification workflows from translating specifications to de... » read more

Chip Industry Week In Review
By The SE Staff - 20 Dec, 2024 - Comments: 0

Updated for 12/20 government fundings and 12/23 for China trade investigation announcements. President Biden announced a trade investigation into "China's unfair trade practices in the semiconductor sector."  The announcement stated "PRC semiconductors often enter the U.S. market as a component of finished goods. This Section 301 investigation will examine a broad range of the PRC’s non-m... » read more

Accelerating Artificial Intelligence Innovation With Concurrent Design Engineering
By Keysight - 20 Dec, 2024 - Comments: 0

Artificial intelligence (AI) is transforming every industry and creating new demands for computing performance, efficiency, and scalability. Designers are creating and deploying AI-dedicated chips to meet these challenges and enable faster and smarter applications across various domains, such as cloud, edge, mobile, automotive, and the Internet of Things (IoT). However, designing AI chips is no... » read more

Why Circuit Designers And Test Engineers Need Impedance Analyzers
By Gabrielle Duncan - 19 Dec, 2024 - Comments: 0

All engineers know resistance is usually bad news. It generates heat. It reduces efficiency. It wears out components and cuts operational lifetimes. However, resistance is not the only kind of opposition to the current. When more complex waveforms are involved (like in radio applications), the inductors and capacitors contribute a different kind of opposition that is highly dynamic and compl... » read more

SLM Evolves Into Critical Aspect Of Chip Design And Operation
By Ann Mutschler - 19 Dec, 2024 - Comments: 0

Silicon lifecycle management has evolved greatly in the past five years, moving from novel concept to a key part of design flows at industry leaders such as NVIDIA, Amazon Web Services, Ericsson, and others. Along with becoming a major focus for companies developing semiconductors, the use cases have expanded. While initially focused on post-silicon insights, SLM has expanded to cover the en... » read more

Blog Review: Dec. 18
By Jesse Allen - 18 Dec, 2024 - Comments: 0

Siemens’ Michael Munsey predicts that the convergence of AI, advanced packaging, and rise of software-defined products aren’t just incremental changes but will represent a fundamental shift in how we think about semiconductor design and manufacturing. Cadence's Veena Parthan points to hex-core voxels as a significant leap forward for the CFD meshing process that blends the best of struct... » read more

Chip Industry Week In Review
By The SE Staff - 13 Dec, 2024 - Comments: 0

The 2024 IEEE International Electron Devices Meeting (IEDM) was held this week, prompting a number of announcements from: imec: Proposed a new CFET-based standard cell architecture for the A7 node containing two rows of CFETs with a shared signal routing wall in between, allowing standard cell heights to be reduced from 4 to 3.5T, compared to single-row CFETs. Integrated indium pho... » read more

Where Is The Software For Shift Left?
By Brian Bailey - 12 Dec, 2024 - Comments: 0

Co-development of hardware and software has been a dream for a long time, but significant hurdles remain. Neither domain is ready with what the other requires at the appropriate time. The earlier something can be done in a development flow, the less likely problems will be found when they are more difficult or expensive to fix. It may require both tool and methodology changes, so that a proc... » read more

Blog Review: Dec. 4
By Jesse Allen - 04 Dec, 2024 - Comments: 0

Siemens' Reetika explains how creating and verifying a complete reset tree structure allows designers to trace the flow of reset signals across the design and ensure that every sequential element is tagged correctly within its respective reset domain. Cadence's Durlov Khan suggests DDR5 DIMM Memory Models and Discrete Component Models as part of a flexible approach to validating specific com... » read more

Aging, Complexity, And AI In Analog Design
By Ed Sperling - 27 Nov, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss abstraction in analog vs. digital, how analog circuits age, the growing role of AI, and why there is so much margin in analog designs, with Mo Faisal, president and CEO of Movellus; Hany Elhak, executive director of product management at Synopsys; Cedric Pujol, product manager at Keysight; and Pradeep Thiagarajan, principal pro... » read more

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