Chip Industry Week In Review


Computex in Taiwan: Arm and Nvidia introduced an AI PC platform, RTX Spark, with an Arm-based Grace CPU, Blackwell RTX GPU, and unified memory. Cadence announced a fully autonomous virtual agentic AI design engineer, enabling customers to run dynamic simulations in automated workflows. Intel launched Xeon 6+, its first data-center CPU built on Intel Foundry's 18A process. The company... » read more

AI-Defined Vehicles Increase Pressure On Auto Ethernet Reliability


Key Takeaways: For AI-defined vehicles and onboard agentic AI, Automotive Ethernet provides high bandwidth for sensor data fusion, TSN ensures low latency and synchronization for real-time decisions, and MACsec secures the data link. Time-sensitive networking (TSN) is an essential protocol for ensuring 10BASE-T1S delivers data to where it needs to go on time. Still, it becomes less esse... » read more

Breaking The “Unhackable” Xbox One


For more than a decade, the Xbox One stood out as one of the most resilient consumer devices ever built. While other consoles from the same era were eventually jailbroken or modified, the Xbox One remained largely untouched. Its layered defenses, hardened boot process, and strong cryptographic foundations earned it a reputation as effectively “unhackable.” That assumption changed at RE//... » read more

Blog Review: Jun. 3


Siemens' Gordon Allan contends that verification IP gives design teams a practical way to verify standards-based interfaces and memories without rebuilding the same infrastructure generation after generation and shares key evaluation metrics. Synopsys' Sutirtha Kabir suggests that successful multi-die design will require deeper collaboration from early architecture exploration to manufacturi... » read more

Pentesting: The Required Human Ingenuity to Uncover Security Gaps


A penetration test (or more commonly, “pentest”) is a software, infrastructure, and or network attack on your organization by a skilled attack team that probes for security weaknesses and seeks to exploit them to reach your assets. The testing team surveys the breadth of potential damage that can be done in an attack and delivers a report that helps an organization prioritize its security w... » read more

Chip Industry Week In Review


ECTC Panel-level packaging, hybrid bonding, new substrates, and fine-pitch interconnects topped the list of advanced packaging technologies at ECTC this week. Among the announcements: ASE launched an automated 310mm × 310mm panel-level packaging production line. Expected to enter production in the first half of 2027, the line is compatible with FOCoS and FOCoS-Bridge pa... » read more

Swapping Out Chiplets: I/Os Vs. Compute


Key Takeaways: Companies can save time and money by swapping out a compute, memory, or I/O chiplet to gain technology improvements, while keeping the other dies stable. Chip architects may choose to keep their I/Os stable and swap out compute to move from a 5nm process node to 3nm to achieve performance and power improvements, or swap out memory from LPDDR5X to LPDDR6. Swapping out... » read more

The Shape Of Prompts: Exploring Their Effect On Inference Infrastructure


AI inference prompts exhibit a shape-shifting behavior, arriving in many forms and attempting to fit themselves within the constraints of the inference stack. Ultimately, it is the design of the inference infrastructure that determines whether it can sustain a large volume of prompts or only a limited number. Prompts are not uniform transactions; they represent dynamic workload profiles whose ... » read more

Rethinking AI-Scale Data Center Validation


The rapid growth of AI workloads is transforming AI data center networking, exposing critical limitations in traditional Ethernet validation and network testing methodologies. As data centers adopt 1.6T Ethernet, 224G SerDes and optical lanes, and tightly coupled GPU fabrics, networks must deliver ultra-high bandwidth, low latency, and predictable performance under dynamic east-west traffic con... » read more

Blog Review: May 27


Cadence's Igor Krause explains Precision Time Measurement (PTM), a PCIe feature that enables precise coordination of events across multiple components with independent local time clocks. Siemens' John McMillan suggests the way to achieve trusted traceability across the semiconductor supply chain is by implementing a blockchain-based distributed ledger paired with a secure digital twin. Sy... » read more

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