tag: Keysight

BiST Grows Up In Automotive
By Ann Mutschler - 12 Jun, 2019 - Comments: 0

Test concepts and methods that have been used for many years in traditional semiconductor and SoC design are now being leveraged for automotive chips, but they need to be adapted and upgraded to enable monitoring of advanced automotive systems during operation of a vehicle. Automotive and safety critical designs have very high quality, reliability, and safety requirements, which pairs pe... » read more

Designing In The Cloud
By Ranjit Adhikary - 06 Jun, 2019 - Comments: 0

Amazon AWS was launched back in 2006. Web based services such as Netflix and Expedia were early adopters, and AWS has grown rapidly, bringing in competition from Google (GCP), Microsoft (Azure) and others. It has taken a while for the design community to embrace the ‘cloud’ as some of the needs and concerns of design teams are different.  Cloud vendors have recognized this untapped market ... » read more

SOC Design & IP Management—A Must For Functional Verification
By Cliosoft - 05 Jun, 2019 - Comments: 0

As a part of the verification flow, verification teams perform different types of simulations based on the nature of the design. The simulations include digital logic functional simulations, mixed-signal functional simulations, power-aware simulations, formal verification runs and gate-level simulations. For a signoff, all planned tests must pass in all four types of simulations. In addition t... » read more

Why IP Quality Is So Difficult To Determine
By Ann Mutschler - 30 May, 2019 - Comments: 0

Differentiating good IP from mediocre or bad IP is getting more difficult, in part because it depends up on how and where it is used and in part because even the best IP may work better in one system than another—even in chips developed by the same vendor. This has been one of the challenges with IP over the years. In many cases, IP is poorly characterized, regardless of whether that IP wa... » read more

Week In Review: Design, Low Power
By Jesse Allen - 24 May, 2019 - Comments: 0

M&A Marvell will acquire Avera Semiconductor, the ASIC business of GlobalFoundries, for $650 million in cash at closing plus an additional $90 million in cash if certain business conditions are satisfied within the next 15 months. The agreements include transfer of Avera's revenue base, strategic design wins with infrastructure OEMs, and a new long-term wafer supply agreement between Globa... » read more

Can The Hardware Supply Chain Remain Secure?
By Andy Patrizio - 15 May, 2019 - Comments: 2

Malware in computers has been a reality since the 1990s, but lately the focus has shifted to hardware. So far, the semiconductor industry has been lucky because well-publicized threats were either limited or unproven. But sooner or later, luck runs out. Last year saw two significant incidents that shook people’s faith in the integrity of hardware security. The first was the Meltdown/Spectr... » read more

The Rapid Success Of IP Reuse
By Ranjit Adhikary - 13 May, 2019 - Comments: 0

The rise of IP use and reuse quickly became a challenge in the early 1990s as designs became more complex. Design teams quickly found themselves struggling to manage not only the vast numbers of IP cores that they were reusing but also versioning, permissions, legal approvals and so on. In the 1990s, software developers were established users of software configuration management (SCM) tools ... » read more

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 10 May, 2019 - Comments: 0

Internet of Things Microsoft this week introduced IoT Plug and Play, a no-code toolkit for connecting Internet of Things devices to the cloud. The company touts it as a new modeling language to pump up the capabilities of IoT devices through the Microsoft Azure cloud service. The Azure IoT Device Catalog lists devices that support IoT Plug and Play, such as the STMicroelectronics SensorTile.bo... » read more

Week In Review: Design, Low Power
By Jesse Allen - 10 May, 2019 - Comments: 0

Tools & IP Cadence uncorked the latest version of JasperGold formal verification platform, providing improvements to the proof-solver algorithm and orchestration by using machine learning to select and parameterize solvers to enable faster first-time proofs and optimize successive runs for regression testing. Additionally, it increases design compilation capacity by over 2x with 50% reduct... » read more

Week In Review: Design, Low Power
By Jesse Allen - 26 Apr, 2019 - Comments: 0

A new working group has been proposed by Accellera to focus on the standardization of analog/mixed signal extensions (AMS) for the Universal Verification Methodology (UVM) standard. “Our ambition is to apply UVM for both digital and analog/mixed-signal verification,” said Martin Barnasconi, Accellera Technical Committee Chair. “The UVM-AMS PWG will assess the benefits of creating analog a... » read more

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