Why Circuit Designers And Test Engineers Need Impedance Analyzers


All engineers know resistance is usually bad news. It generates heat. It reduces efficiency. It wears out components and cuts operational lifetimes. However, resistance is not the only kind of opposition to the current. When more complex waveforms are involved (like in radio applications), the inductors and capacitors contribute a different kind of opposition that is highly dynamic and compl... » read more

SLM Evolves Into Critical Aspect Of Chip Design And Operation


Silicon lifecycle management has evolved greatly in the past five years, moving from novel concept to a key part of design flows at industry leaders such as NVIDIA, Amazon Web Services, Ericsson, and others. Along with becoming a major focus for companies developing semiconductors, the use cases have expanded. While initially focused on post-silicon insights, SLM has expanded to cover the en... » read more

Blog Review: Dec. 18


Siemens’ Michael Munsey predicts that the convergence of AI, advanced packaging, and rise of software-defined products aren’t just incremental changes but will represent a fundamental shift in how we think about semiconductor design and manufacturing. Cadence's Veena Parthan points to hex-core voxels as a significant leap forward for the CFD meshing process that blends the best of struct... » read more

Chip Industry Week In Review


The 2024 IEEE International Electron Devices Meeting (IEDM) was held this week, prompting a number of announcements from: imec: Proposed a new CFET-based standard cell architecture for the A7 node containing two rows of CFETs with a shared signal routing wall in between, allowing standard cell heights to be reduced from 4 to 3.5T, compared to single-row CFETs. Integrated indium pho... » read more

Where Is The Software For Shift Left?


Co-development of hardware and software has been a dream for a long time, but significant hurdles remain. Neither domain is ready with what the other requires at the appropriate time. The earlier something can be done in a development flow, the less likely problems will be found when they are more difficult or expensive to fix. It may require both tool and methodology changes, so that a proc... » read more

Blog Review: Dec. 4


Siemens' Reetika explains how creating and verifying a complete reset tree structure allows designers to trace the flow of reset signals across the design and ensure that every sequential element is tagged correctly within its respective reset domain. Cadence's Durlov Khan suggests DDR5 DIMM Memory Models and Discrete Component Models as part of a flexible approach to validating specific com... » read more

Aging, Complexity, And AI In Analog Design


Experts at the Table: Semiconductor Engineering sat down to discuss abstraction in analog vs. digital, how analog circuits age, the growing role of AI, and why there is so much margin in analog designs, with Mo Faisal, president and CEO of Movellus; Hany Elhak, executive director of product management at Synopsys; Cedric Pujol, product manager at Keysight; and Pradeep Thiagarajan, principal pro... » read more

Top-Down Vs. Bottom-Up Chiplet Design


Chiplets are gaining widespread attention across the semiconductor industry, but for this approach to really take off commercially it will require more standards, better modeling technologies and methodologies, and a hefty amount of investment and experimentation. The case for chiplets is well understood. They can speed up time to market with consistent results, at whatever process node work... » read more

The Latest Wireless Industry Use Cases


The wireless industry evolves constantly; GSMA estimates that mobile technologies and services generated 5% of the global GDP in 2022, which equates to $5.2 trillion of economic value. In parallel, more than 5.4 billion people subscribed to a mobile service, with 4.4 billion connected to the mobile internet. These numbers are impressive, but there is much more to come. 5G networks promise exp... » read more

Slow Progress On Generative EDA


Progress is being made in generative EDA, but the lack of training data remains the biggest problem. Some areas are finding ways around this. Generative AI, driven by large language models (LLMs), stormed into the world just two years ago, and since then has worked its way into almost every aspect of our lives. Some people love it, others hate it, and some even give dire warnings about machi... » read more

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