Experts At The Table: Multi-Foundry Strategies

By Ed Sperling - 27 Jun, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing and Design sat down with Walter Ng, vice president of the IP ecosystem at GlobalFoundries; John Murphy, director of strategic alliances marketing at Cadence; Michael Buehler-Garcia, director of Calibre design solutions marketing at Mentor Graphics; Bob Smith, vice president of marketing and business development at Magma, and Linh Hong, vice president ... » read more

Multisourcing Options

By Ed Sperling - 27 Jun, 2011 - Comments: 0

Semiconductor Manufacturing & Design discusses the ability to move chip designs from one foundry to another with Walter Ng of Global Foundries, Michael Buehler-Garcia of Mentor Graphics, John Murphy of Cadence and Ling Hong of Kilopass. [youtube vid=1YxYKmfL4SE] » read more

What’s A Cell Phone?

By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ed Sperling Just because a smart phone is sold by Verizon or AT&T mobile no longer means that it will be used primarily as a phone. That distinction may sound trivial, but it has deep implications for the components that are used inside of these devices, how they’re used, and who wins the designs. Shifts such as this can also lead to broad changes in who buys the tools to develop t... » read more

When It Comes To Intellectual Property, Size Matters

By Various Writers - 19 Aug, 2009 - Comments: 0

By Geoffrey James Intellectual property was once seen as the new growth market for EDA. Dozens of firms – large and small – jumped on the IP bandwagon, attracted to the “build once, sell many times” business model. “As late as 2004, the industry was still thinking that as much as 90% of SoCs would be reused IP,” said EDA consultant Gary Smith. The IP segment, however, hasn�... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Kilopass

Experts At The Table: Multi-Foundry Strategies

Multisourcing Options

What’s A Cell Phone?

When It Comes To Intellectual Property, Size Matters