How 5G Differs From Previous Network Technologies


The Mobile World Congress in Barcelona, Spain is the wireless industry’s leading annual event, and this year’s edition in late February was buzzing with talk of 5G wireless technology and its evolving uses and technology requirements. First, Gregg Bartlett and Dr. Bami Bastani, Sr. Vice Presidents of GlobalFoundries' CMOS and RF business units, respectively, outlined 5G-related semico... » read more

Tail End Latency And Server Debug


The rise of the heterogeneous multicore processor has enabled a massive increase in the ability of data centers to deliver advanced services to billions of users worldwide. But the complexity that is now possible has made the optimization of these services difficult to achieve. Providers of heterogeneous multicore SoCs have an opportunity to deliver the tools to make optimization of highly dist... » read more

The Ideal Solution For AI Applications — Speedcore eFPGAs


AI requires a careful balance of datapath performance, memory latency, and throughput that requires an approach based on pulling as much of the functionality as possible into an ASIC or SoC. But that single-chip device needs plasticity to be able to handle the changes in structure that are inevitable in machine-learning projects. Adding eFPGA technology provides the mixture of flexibility and s... » read more

How To Choose The Right Memory


When it comes to designing memory, there is no such thing as one size fits all. And given the long list of memory types and usage scenarios, system architects must be absolutely clear on the system requirements for their application. A first decision is whether or not to put the memory on the logic die as part of the SoC, or keep it as off-chip memory. "The tradeoff between latency and th... » read more

Tail End Latency And Server Debug


In the drive to deliver highly scalable services that meet the demands of mobile users, enterprises and, increasingly, the Internet of things, the software underpinning them has become incredibly complex. At the same time, the systems that run these complex workloads have become prone to troublesome and often baffling performance issues. Response times measured over the course of millions of... » read more

Democratized Autonomous Vehicle System Design


The major question facing automotive equipment vendors and OEMs working to bring autonomous vehicles to market: how to address the additional cost and power of these new electronic systems while reducing system latency and improving manufacturability? TIRIAS Research says the DRS360 Autonomous Driving Platform provides an answer. To read more, click here. » read more

Pushing DRAM’s Limits


If humans ever do create a genuinely self-aware artificial intelligence, it may well exhibit the frustration of waiting for data arrive. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. But latency improved only 1.3x, according to Kevin Chang, a researcher at Carnegie Mellon Universit... » read more

Toward Better Accelerators


In the not-too-distant past, the standard mobile application processor architecture was the predominant one used for most System-on-Chip (SoC) designs, but that is rapidly changing as new systems and applications emerge in the post-mobile computing era. New requirements for autonomous driving are motivating technology innovations: Visual processing, deep neural networks and machine learning pla... » read more

Adapt Or Perish: A Unified Theory Of Coherency


Evolution is a natural process and more importantly a relatively slow process that has eventually got us here, capable of perceiving, analyzing, and handling complex tasks. As our environment, society, and surroundings became more complex we learned how to adapt at a brisk and instantaneous manner, in this melting pot of a heterogeneous world. The evidence can be seen in all ages, from the poli... » read more

Why Is Semiconductor Schedule Predictability Boring?


Why is it not sexy to talk about the manageability of system-on-chip (SoC) projects? As an IP vendor, we are constantly bombarded with questions about how our technology can enhance performance, reduce latency, and lower power consumption. At the same time, reducing cost and time to market for the SoC design conflict with these requirements, even though they rank right up there among the top en... » read more

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