Week in Review: Design, Low Power

By Jesse Allen - 03 Feb, 2023 - Comments: 0

Intel discontinued its Pathfinder for RISC-V program, according to numerous reports. The program provided a pre-silicon development environment to support IP selection and early-stage software development using Intel FPGA and simulator platforms. "Since Intel will not be providing any additional releases or bug fixes, we encourage you to promptly transition to third-party RISC-V software tools ... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 24 Aug, 2018 - Comments: 0

Internet of Things Arm uncorked its first forward-looking CPU roadmap and performance numbers for client computing. The company said it expects to deliver annual performance improvements of more than 15% per year through 2020. The targeted market includes 5G, always-on, always-connected devices. C3 IoT will work with Google Cloud to support artificial intelligence and Internet of Things dep... » read more

Building And Configuring A Linux OS From Linaro

By Aldec - 25 Jan, 2017 - Comments: 0

The Linux operating system is a very popular operating system for embedded applications. Many modern systems including IoT gateways use the Linux OS because of its versatility and support for multiple architectures. The Aldec TySOM platform, which is based on the Xilinx Zynq SoC with ARM Cortex processor, can be utilized as an IoT Gateway system. This document describes the process for building... » read more

Five Ways To Avoid Being The Next IoT Security Headline

By Rob Coombs - 08 Dec, 2016 - Comments: 0

Whether it is the remote hacking of cars or the rise of the IoT botnet we have all read the scary headlines: security for the IoT is a growing issue. But how exactly do you stop your company and your product appearing on the front page, as part of the latest security violation story? Security in IoT is more than just the processor, it requires an approach that protects the entire system and all... » read more

Better Heterogeneous CPU Designs

By Ronan Synnott - 28 Apr, 2016 - Comments: 0

The trend toward heterogeneous CPU designs is growing. Case in point: The NXP i.MX7 family of devices have such a design. In this blog, I will discuss the (simple) steps necessary to get the most out of i.MX7 using the ARM Development Studio, more commonly known as DS-5, but the information applies to most similar systems. Compiling code depends greatly on the use case. Within DS-5, there... » read more

Rightsizing Challenges Grow

By Ed Sperling - 20 Apr, 2016 - Comments: 0

Rightsizing chip architectures is getting much more complicated. There are more options to choose from, more potential bottlenecks, and many more choices about what process to use at what process node and for which markets and price points. Rightsizing is a way of targeting chips to specific application needs, supplying sufficient performance while minimizing power and cost. It has been a to... » read more

The Week In Review: Design

By Ed Sperling - 03 Jul, 2014 - Comments: 0

Tools The Android Open Source Project for ARM’s v8-A architecture is now available as part of the Linaro 14.06 release. The release has been tested on 64-bit multicore processors. Research NXP conducted a secure credit card survey that showed Americans are more likely to pay cash following security breaches at large retail chains, with 69% in favor of secure credit cards to guard against... » read more

Linux And The Big Bad Wolf

By Achim Nohl - 26 Jun, 2014 - Comments: 0

With great interest, I am following any news around the progress of Linaro and the Linux kernel community with regard to addressing all the requirements for an ARMv8 64-bit server software stack. Well-established standards, such as the Unified Extensible Firmware Interface (UEFI) and Advanced Configuration and Power Interface (ACPI), are impacting the development direction of the community b... » read more

Executive Insight: Simon Segars

By Ed Sperling - 03 Jun, 2014 - Comments: 0

SE: What concerns you most? Segars: In the context of design and where chip design is going, ARM is a long-term business. We’re doing stuff now that is going to ship in five years’ time. Obviously, for everyone in this space, Moore’s Law has been a fantastic thing. It’s enabled us to achieve really fantastic scaling of transistors, and everyone knows that is getting harder and harder... » read more

Better Software. Faster!

By Tom De Schutter - 27 Mar, 2014 - Comments: 0

As virtual prototyping has seen a wide adoption over the last couple of years, it felt like the right time to work with industry leaders across multiple applications and publish a book that captures the best practices in virtual prototyping. As editor of the book: Better Software. Faster!, I had the privilege to work with some incredibly knowledgeable people who have been deploying virtual prot... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

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Partitioning In The Chiplet Era

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by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?