Week in Review: Design, Low Power

Intel halts RISC-V program; standardizing chiplet descriptions; DARPA aims for useful quantum; Arm sells HPC tools biz; faster DDR5 RDC.


Intel discontinued its Pathfinder for RISC-V program, according to numerous reports. The program provided a pre-silicon development environment to support IP selection and early-stage software development using Intel FPGA and simulator platforms. “Since Intel will not be providing any additional releases or bug fixes, we encourage you to promptly transition to third-party RISC-V software tools that best meet your development needs,” a notice from the company read. Intel and SiFive are still collaborating on a development board based on RISC-V.

JEDEC and the Open Compute Project are teaming up on a framework to transfer technology from OCP specifications to JEDEC standards. The first effort will focus on standardizing chiplet part descriptions by bringing the OCP Chiplet Data Extensible Markup Language (CDXML) to the JEDEC JEP30: Part Model Guidelines. The chiplet description will include information needed for system in package (SiP) design such as chiplet thermal properties, physical and mechanical requirements, behavior specifications, power and signal integrity properties, testing the chiplet in package, and security parameters.

DARPA selected three companies to participate in its Underexplored Systems for Utility-Scale Quantum Computing (US2QC) program that aims to find a quantum computer where the computational value exceeds its cost. “Experts disagree on whether a utility-scale quantum computer based on conventional designs is still decades away or could be achieved much sooner,” said Joe Altepeter, US2QC program manager in DARPA’s Defense Sciences Office. “We put out a call last year saying that if anyone thought they had a truly revolutionary approach to building a useful quantum computer in the near future – less than 10 years – we wanted to hear from them.” Two of the companies in the program are startups: Atom Computing builds highly scalable quantum computers based on large arrays of optically-trapped atoms, and PsiQuantum, which is using silicon-based photonics to create an error-corrected quantum computer based on a lattice-like fabric of photonic qubits. Additionally, Microsoft will join the program with its efforts to build an industrial-scale quantum system based on a topological qubit architecture.

It’s not just the U.S. pushing to advance quantum computing: January’s startup funding report features seven quantum companies from all around the world that collectively raised over $240 million. January saw more than 130 companies raise over $2 billion. And for a much deeper analysis of the startup landscape, check out the 2022 annual funding report, which details where the money went, why it was invested there, and who supplied it.

Linaro will acquire the Arm Forge high performance computing (HPC) tools business. Originally part of Arm’s Allinea Software acquisition in 2016, Arm Force provides debug and performance analysis tools across multiple compute architectures for server and HPC applications. Linaro offers software development tools for the Arm ecosystem.

Tools & IP

Rambus debuted its new 6400 MT/s DDR5 Registering Clock Driver (RCD). Targeting data center servers, it provides a 33% increase in data rate and bandwidth over Gen1 4800 MT/s solutions with optimized timing parameters for improved RDIMM margins.

Also in data centers, CXL is gaining traction as a way of boosting utilization of different compute elements, such as memories and accelerators, while minimizing the need for additional racks of servers. But the standard is being extended and modified so quickly that it is difficult to keep up with all the changes, each of which needs to be verified and validated across a growing swath of heterogeneous and often customized designs.

Siemens EDA unveiled a new tool that aims to help global engineering teams collaborate in real time. Questa Verification IQ unifies coverage data from Siemens’ formal, simulation, emulation, and prototyping products and uses machine learning functionality to analyze the data to predict patterns and holes, identify root causes, and prescribe solutions to potential issues. It integrates with the company’s Polarion Requirements application lifecycle management solution.

Cadence’s 3D-IC reference flow was certified for UMC’s hybrid bonding technologies. The reference flow is built around a high-capacity, multi-technology hierarchical database that enables multiple chiplets in a 3D stack to be designed and analyzed together through integrated early analysis for thermal, power and static timing analysis.

What does 2023 have in store for chip design? Industry experts make hopeful predictions around open source, government investment, scaling, and sustainability.

Xpeedic released a platform for package/board signal integrity, power integrity, and thermal analysis. The simulation flow includes DC IR-drop and AC impedance analysis, decoupling capacitor optimization, signal topology extraction, signal interconnect modeling, and thermal analysis.

SiMa.ai uncorked two PCIe-based production boards for embedded edge AI. The boards use the company’s MLSoC platform for computer vision.

Research notes

Sharper, defect-free displays could be possible by stacking the red, green, and blue light-emitting diodes vertically instead of laying them side by side, according to new research from MIT, Georgia Tech Europe, Sejong University, and other universities. Each stacked pixel measures about 4 microns wide, and the microLEDs can be packed to a density of 5,000 pixels per inch, which the researchers claim is the smallest pixel and highest density reported. By altering the voltage applied to each of the pixel’s red, green, and blue membranes, they could produce various colors in a single pixel. “If you have a higher current to red, and weaker to blue, the pixel would appear pink, and so on,” said Jiho Shin, a postdoc at MIT. “We’re able to create all the mixed colors, and our display can cover close to the commercial color space that’s available.”

A new type of transistor suited for use in bioelectronics has been developed by researchers at Northwestern University. The electrochemical transistor is based on an electronic polymer and a vertical architecture. It conducts both electricity and ions and is stable in air. It is also compatible with blood and water and can amplify important signals, making it especially useful for biomedical sensing. “This exciting new type of transistor allows us to speak the language of both biological systems, which often communicate via ionic signaling, and electronic systems, which communicate with electrons,” Jonathan Rivnay, professor of biomedical engineering at Northwestern. “The ability of the transistors to work very efficiently as ‘mixed conductors’ makes them attractive for bioelectronic diagnostics and therapies.”

Carbon nanotube yarns that generate electricity when stretched or twisted can be sewn into textiles to both sense and harvest energy from human motion are being developed by researchers at the University of Texas at Dallas. They team recently improved their yarn, intertwining three individual strands of spun carbon nanotube fibers to make a single yarn. This provided a big boost to the energy conversion efficiency, bringing it up to 17.4% for tensile (stretching) energy harvesting and 22.4% for torsional (twisting) energy harvesting. They are also investigating using it for wave power generation.

Upcoming events

  • International Symposium on Field-Programmable Gate Arrays: February 12 – February 14 in Monterey, CA
  • 2023 International Solid-State Circuits Conference (ISSCC 2023): February 19 – February 23 in San Francisco, CA
  • Phil Kaufman Award & Banquet: February 23 in San Jose, CA
  • HPCA 2023: IEEE International Symposium on High-Performance Computer Architecture: February 25 – March 1 in Montreal, QC, Canada
  • Large-area, Organic and Printed Electronics Convention (LOPEC): February 28 – March 2 in Munich, Germany
  • DVCon U.S. 2023: February 27 – March 2, in San Jose, CA
  • Infineon’s Wide-Bandgap Developer Forum: March 9, Online
  • Embedded World 2023: March 14 – March 16 in Nuremberg, Germany
  • International Symposium on Physical Design (ISPD): March 26 – March 29, Online
  • Tiny ML Summit 2023: March 27 – March 29 in Burlingame, CA
  • MEMCon 2023: Next Gen Datacenters, Memory Innovation & CXL: March 28 – March 29 in Mountain View, CA
  • SNUG Silicon Valley: March 29 – March 30 in Santa Clara, CA

Check out the events page for more.

Further reading

Check out the latest Low Power-High Performance and Systems & Design newsletters for these highlights and more:

  • Power Issues Causing More Respins At 7nm And Below
  • CXL Picks Up Steam In Data Centers
  • Choosing The Correct High-Bandwidth Memory
  • Design And Verification Methodologies Breaking Down
  • Selecting The Right RISC-V Core

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