tag: low-power design

Mixed-signal/Low-power Design
By Jeff Dorsch - 03 Aug, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

Mixed-signal/Low-power Design
By Jeff Dorsch - 26 Jul, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

Energy-Efficient Design Helps Autonomous Vehicles Take Off
By Margaret Schmitt - 18 Jul, 2016 - Comments: 1

A new flight endurance record was set recently by the Predator B/MQ-9 Reaper Big Wing experimental drone, traveling 37 hours non-stop, and setting the bar for the next stage of autonomous flight development. The growth of drone technology and their autonomous capabilities for surveillance, security, and reconnaissance has grown rapidly over the past several years, thanks to ever-increasing perf... » read more

Implementation Limits Power Optimization
By Ann Mutschler - 14 Jul, 2016 - Comments: 3

Implementation is still the step that makes or breaks power budgets in chip design, despite improvements in power estimation, power simulations, and an increase in the number of power-related architectural decisions. The reason: All of those decisions must be carried throughout the design flow. “If implementation decides to give up, then it doesn't really matter at the end of the day,” s... » read more

Mixed-Signal/Low-Power Design
By Jeff Dorsch - 14 Jul, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

Addressing Process Variation And Reducing Timing Pessimism At 16nm And Below
By Cadence - 13 Jul, 2016 - Comments: 0

At 16nm and below, on-chip variation (OCV) becomes a critically important issue. Increasing process variation makes a larger impact on timing, which becomes more pronounced in low-power designs with ultra-low voltage operating conditions. In this paper, we will discuss how a new methodology involving more accurate library characterization and variation modeling can reduce timing margins in libr... » read more

Executive Insight: Grant Pierce
By Ed Sperling - 29 Jun, 2016 - Comments: 0

Grant Pierce, president and CEO of Sonics, sat down with Semiconductor Engineering to discuss new ways to increase energy efficiency in SoCs. What follows are excerpts of that conversation. SE: Looking out at the semiconductor industry there are a lot of changes underway right now. What are the biggest impacts from your perspective? Pierce: The amount of data that is being captured or sen... » read more

Performance First
By Ed Sperling - 16 Jun, 2016 - Comments: 0

Crank up the clock speed. It takes a lot more performance to run virtual reality smoothly, or to process data in the cloud, or to stream a high-definition video from a drone. And none of that compares to the amount of performance required to kill an array of disturbingly realistic zombies on a mobile device in conjunction with other players scattered around the globe. After several years of ... » read more

Big Data Meets Chip Design
By Ann Mutschler - 16 Jun, 2016 - Comments: 0

The amount of data being handled in chip design is growing significantly at each new node, prompting chipmakers to begin using some of the same concepts, technologies and algorithms used in data centers at companies such as Google, Facebook and GE. While the total data sizes in chip design are still relatively small compared with cloud operations—terabytes per year versus petabytes and exa... » read more

Tech Talk: Power Reduction
By Ed Sperling - 01 Jun, 2016 - Comments: 0

Sonics CTO Drew Wingard talks about energy processing units, and how to utilize idling circuitry to save as much as 95% of the energy spent on specific processes. [youtube vid=IZy38BfHP60] » read more

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