tag: low-power design

How Many Cores? (Part 1)
By Ed Sperling - 10 Mar, 2016 - Comments: 2

The optimal number of processor cores in chip designs is becoming less obvious, in part due to new design and architectural options that make it harder to draw clear comparisons, and in part because just throwing more cores at a problem does not guarantee better performance. This is hardly a new problem, but it does have a sizable list of new permutations and variables—right-sized heteroge... » read more

Micro-Architectural Exploration for Low Power Design
By Abhishek Ranjan - 14 Jan, 2016 - Comments: 0

In the first part of this series, we had discussed the need to perform power optimizations and exploration at higher levels of abstractions where the potential to reduce the power consumption is highest. We presented the need for making coarser changes at higher level of abstractions to exploit full power saving potential. In the second part, we discussed some very potent micro-architectural te... » read more

Transistor-Level Verification Returns
By Brian Bailey - 13 Jan, 2016 - Comments: 1

A few decades ago, all designers did transistor-level verification, but they were quite happy to say goodbye to it when standard cells provided isolation at the gate-level and libraries provided all of the detailed information required, such as timing. A few dedicated people continued to use the technology to provide those models and libraries and the most aggressive designs that wanted to stri... » read more

New Approaches To Low Power Design
By Ann Mutschler - 14 Dec, 2015 - Comments: 1

While Moore's Law continues to drive feature size reduction and complexity, a whole separate part of the industry is growing up around vertical markets in the IoT. While these two worlds may be different in many respects, they share one thing in common—low power design is critical to success. How engineering teams minimize power in each of these markets, and even within the same market, ca... » read more

Micro-Architectural Exploration For Low Power Design
By Abhishek Ranjan - 10 Dec, 2015 - Comments: 0

By Abhishek Ranjan, Saurabh Shrimal and Sanjiv Narayan In the first part of this series, we discussed the need to perform power optimizations and exploration at higher levels of abstractions, where the potential to reduce the power consumption was highest. While fine-grained local changes (like clock-gating, operand isolation, etc.) for power reduction are well understood and widely adopted,... » read more

Low Power Design Analysis
By Ansys - 09 Dec, 2015 - Comments: 0

This paper presents a methodology for comprehensive power grid verification coverage, including identification of power grid weaknesses early in the design cycle. To read more, click here. » read more

Power Requires Holistic Perspective
By Ann Mutschler - 15 Oct, 2015 - Comments: 0

With the move to smaller manufacturing nodes, power must be looked at from a holistic perspective. Instead of just optimizing a device or devising next generation power gating, power must be considered in the context of the whole system, Aveek Sarkar, vice president of product engineering and support at Ansys/Apache mentioned during a recent discussion about 5nm. In fact, he said, this c... » read more

Think IoT Designs Are Challenging? Try Embedded Systems In The Brain
By Brian Fuller - 13 Aug, 2015 - Comments: 0

There’s low power and then there’s low power. There are amazing applications and then there are amazing applications. Today the bleeding edge of low power design is not so much in IoT (although excellent work is being done in that space) but in medical, where the stakes are high and possible outcomes life-altering. Chet Moritz, associate professor with the University of Washington’s... » read more

A Survey Of Our Low Power Blogs In 2014
By Rob Eccles - 12 Dec, 2014 - Comments: 0

Over the past year, we have written a number of blogs on low power IC design. Here at the end of 2014 approaches, let’s look back at what we have discussed Our blogs covered methods to estimate and reduce power consumption in digital ICs. Our recommendation is that you do this early in the design cycle, such as the RTL coding stage, when you can have the most positive impact. In the first... » read more

Power Limits Apps In The IoT
By Ann Mutschler - 04 Dec, 2014 - Comments: 0

The applications in the IoT are seemingly limitless, but the power is one thing that can’t be. Mary Ann White at Synopsys reminded me that a lot of the energy harvesting devices are super low power and there is a reason why they use just a simple LCD-type display. But we agree it would be so cool if we could have color LCDs that still only consume low power. Of course, I have no doubt tha... » read more

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