Killer Bugs


By Ed Sperling Hardware and software bugs are all around us. When an application suddenly dies or a smart phone freezes because of the unanticipated interaction between hardware and software blocks in a system on chip, most users aren’t even the least bit fazed. They usually just re-boot and forget about it. Bugs caused by power are an entirely different matter, however. For one thing, ... » read more

Pricey Processes For Low Power


By Pallab Chatterjee Recently Samsung gave an update on the status and availability of its advanced 32/28nm process technology for use in foundry. The process is targeted for shipping designs to customers at the end of this year, with a road map that continues through the 22/20nm nodes and down to 15nm. What was particularly interesting were several key innovations that have made this all p... » read more

New x86 Technology For The Datacenter?


I wasn’t too surprised when IBM announced new servers early this month that they claim “break constraints of 30-year technology design,” since Big Blue is constantly releasing new products that they say are groundbreaking in one way or another. Reading deeper into the news, IBM is using new semiconductor technology at the heart of its new eX5 servers that it said took its engineering t... » read more

Rethinking Test


By Ann Steffora Mutschler The responsibility of semiconductor test has long sat solely with the test engineer as the chip designer focused on the functionality of the device. However, particularly in low-power designs, when the device is being tested, much higher power levels are applied than normal functional operation – sometimes causing the device to fail. This ‘false failure’ c... » read more

We Changed Our Name


Low-Power Design today changes its name to Low-Power Engineering reflecting a broader context for low-power issues that extend well beyond the confines of just design. We discovered the need for this change several months ago—and many stories after launching Low-Power Design. Polls of our readers and our sponsors, which we conduct on a regular basis, showed our name was too narrow for the ... » read more

Considerations For Choosing The Right Low-Power Tools


By Cheryl Ajluni Regardless of what you are designing these days, one fact holds true: Your design is only as good as the design tools you use. Gone are the days when a design could be done on the back of napkin. Today, engineers require a complex ecosystem of interworking tools to guide them through the complex design flow. This is especially true when it comes to low-power design, as i... » read more

End User Report: Reliability


John Kern, vice president of product operations inside Cisco Systems’ customer value chain management group, sat down with Low-Power Engineering to talk about the company’s internal focus on reliability and what factors are causing the most concern. What follows are excerpts of that conversation. By Ed Sperling LPE: How does Cisco gauge reliability? John Kern: The bulk of our re... » read more

Battery Progress Inches Forward


By Ed Sperling Chip companies that have been betting the future on better battery technology and holding off on the often painful process of reducing voltage should probably start rethinking their plans. Battery technology is not expected to improve by more than 3% per year, and even that may slow. Compared with the chip side, there are no breakthrough materials such as halfnium or techno... » read more

Defining Reliability In Low-Power Designs


By Ann Steffora Mutschler Having a clear understanding of what reliability means for a particular low-power application can make a significant difference when it comes to communicating with engineering team members and customers. Is reliability simply a question of how long a device can run without errors? And what happens to reliability when power modeling, verification and other design tec... » read more

End User Report: The Case For Formalizing Power Modeling


While the industry clearly agrees that power modeling is a necessity for next-generation semiconductor design at the transaction level, what is lacking is a standard way to exchange power models. Low-Power Design talked with David Hathaway, Senior Technical Staff Member at IBM Electronic Design Automation and Nagu Dhanwada, Senior R&D Engineer and Team Lead for Chip Level Power Analysis T... » read more

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