tag: low-power design

Handcrafted Designs
By Ed Sperling - 20 Aug, 2009 - Comments: 0

Ludo Deferm, VP of business development at IMEC, the Belgian research house, talks about changes ahead at future process nodes. [youtube vid=8b6O52qY0bs] » read more

Experts At The Table: ESL And Low Power
By Ed Sperling - 16 Jul, 2009 - Comments: 0

By Ed Sperling Low-Power Design sat down with Walter Ng, senior director of platform alliances at Chartered Semiconductor; Brani Buric, executive vice president of sales and marketing at Virage Logic; John Sanguinetti, CTO at Forte Design Systems and Andrea Kroll vice president of marketing and business development at JEDA Technologies. What follows are excerpts of that discussion. ... » read more

FPGA Vendors Throw Kitchen Sink at Power-Consumption Issues
By Brian Fuller - 10 Jun, 2009 - Comments: 0

By Brian Fuller In the storied history of semiconductors, each era finds vendors generally attaching their strategy to a trendy application segment to differentiate themselves. For years, IC vendors were “computer companies.” Then they were in the “communications” business and more recently they were all about “consumer.” But the evolution of technology has forced a re-assessm... » read more

Lower Power, Bigger Problems
By Ed Sperling - 13 May, 2009 - Comments: 0

By Ed Sperling Low power used to be an afterthought in semiconductor design, and it almost was never a consideration in verification or manufacturability. But at each new process node, the number of power considerations goes up as the line widths go down. To begin with, there are two basic types of power. The first is dynamic, which has been a consideration ever since batteries were added int... » read more

Less Room For Error
By Ed Sperling - 13 May, 2009 - Comments: 0

By Ed Sperling Say goodbye to fat design margins in advanced SoCs. The commonly used method of adding extra performance or area into semiconductors to overcome variability in manufacturing processes or timing closure issues has begun to create problems of its own. While there was plenty of slack available at 90nm, adding margins at 45nm and 32nm disrupts performance or eats into an increasing... » read more

Tesla: The Ultimate Low-Power Design
By Ed Sperling - 13 May, 2009 - Comments: 0

When your battery pack alone costs $30,000 and you get 200 miles per charge, you've got to be looking for ways to save power. The Tesla roadster is crammed with parts from many Silicon Valley companies, all designed to draw as little power as possible. But there's still much more work to be done. [youtube vid=qdGLvJzBUYI] » read more

Tech Talk: Saving Power By The Milliwatt
By Ed Sperling - 02 Apr, 2009 - Comments: 0

Jan Rabaey, head of UC Berkeley's Wireless Research Center and the author of a new book entitled, "Low Power Design Essentials," discusses how to generate small amounts of power and what can be done to reduce the amount of power needed for semiconductor design. [youtube vid=G0j1Sm8RCns] » read more

Low-Power Standards War
By Ann Mutschler - 13 Mar, 2009 - Comments: 0

To the uninitiated, establishing a technology standard may seem straightforward. In reality, the process is mired with technical and political issues as evidenced by the ongoing battle for a de facto low-power design standard between the Unified Power Format (UPF) and the Common Power Format (CPF).   Currently, UPF is with the IEEE for final ratification as P1801, set for vote this month, ... » read more

Plumbing 101: Current Leakage And What to Do About It
By Brian Fuller - 13 Mar, 2009 - Comments: 0

By Brian Fuller Rising demand for mobile products and the march of Moore’s Law have created conditions for a perfect storm that threatens to swamp electronics designs and the market growth those designs target. The catalyst for that storm is leakage, which worsens the smaller devices become. Even in an “off” state, systems can leak like poorly insulated houses. But as the nation think... » read more

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