tag: machine learning

Customization And Limitations At The Edge
By Ed Sperling - 10 Aug, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss the edge constraints and the need for security with Jeff DeAngelis, managing director of the Industrial and Healthcare Business Unit at Maxim Integrated; Norman Chang, chief technologist at Ansys; Andrew Grant, senior director of artificial intelligence at Imagination Technologies; Thomas Ensergueix, senior director of the automotive and IoT line of... » read more

Big Changes In AI Design
By Ed Sperling And Susan Rambo - 06 Aug, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss AI and its move to the edge with Steven Woo, vice president of enterprise solutions technology and distinguished inventor at Rambus; Kris Ardis, executive director at Maxim Integrated; Steve Roddy, vice president of Arm's Products Learning Group; and Vinay Mehta, inference technical marketing manager at Flex Logix. What follows are excerpts of that ... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 31 Jul, 2020 - Comments: 0

Pervasive computing — data center, edge, IoT, 5G Qualcomm settled its 5G licensing disagreement with Huawei, which will pay $1.8 billion in back royalties and will pay for licensing going forward. Huawei is also now the world’s largest supplier of smartphones, surpassing Samsung Electronics Co. Qualcomm also announced a super-fast charging platform this week for Android devices that is sup... » read more

Engineering Within Constraints
By Brian Bailey - 30 Jul, 2020 - Comments: 0

One of the themes of DAC this year was the next phase of machine learning. It is as if CNNs and RNNs officially have migrated from the research community and all that is left now is optimization. The academics need something new. Quite correctly, they have identified power as the biggest problem associated with learning and inferencing today, and a large part of that problem is associated with ... » read more

Machine Learning — Everywhere: Enabling Self-Optimizing Design Platforms
By Synopsys - 29 Jul, 2020 - Comments: 0

Machine-learning offers opportunities to enable self-optimizing design tools. Very much like self-driving cars that observe real-world interactions to improve their responses in different (local) driving conditions, AI-enhanced tools are able to learn and improve in (local) design environments after deployment. These new, ML-driven capabilities can be embedded in different design engines, gi... » read more

Speeding Up The R&D Metrology Process
By Mark LaPedus - 16 Jul, 2020 - Comments: 0

Several chipmakers are making some major changes in the characterization/metrology lab, adding more fab-like processes in this group to help speed up chip development times. The characterization/metrology lab, which is generally under the radar, is a group that works with the R&D organization and the fab. The characterization lab is involved in the early analytical work for next-generati... » read more

It’s Eternal Spring For AI
By Rama Chellappa - 14 Jul, 2020 - Comments: 0

The field of Artificial Intelligence (AI) has had many ups and downs largely due to unrealistic expectations created by everyone involved including researchers, sponsors, developers, and even consumers. The “reemergence” of AI has lot to do with recent developments in supporting technologies and fields such as sensors, computing at macro and micro scales, communication networks and progre... » read more

Designer And IP Tracks Swell With Focus On ML, Security And Traditional EDA Methodologies
By Michelle Clancy - 13 Jul, 2020 - Comments: 0

What are designers keenly interested in as the 57th Design Automation Conference (DAC) approaches? If you said machine learning (ML), you’d be only partially right. Based on designer and IP tracks submissions to the 57th edition of the venerable electronics-industry event, ML – how to design with it and optimize EDA tools and flows using it – is a hot topic. But so too are more traditi... » read more

Machine Learning Enabled Root Cause Analysis For Low Power Verification
By Himanshu Bhatt - 13 Jul, 2020 - Comments: 0

By Himanshu Bhatt and Susantha Wijesekara Next-generation SoCs with advanced graphics, computing and artificial intelligence capabilities are posing unforeseen challenges in verification. Designers and verification engineers using static verification technologies for low power often see many violations in the initial stages. Efficient debugging and determining root cause is a real issue and ... » read more

Moving Data And Computing Closer Together
By Bryon Moyer - 09 Jul, 2020 - Comments: 2

The speed of processors has increased to the point where they often are no longer the performance bottleneck for many systems. It's now about data access. Moving data around costs both time and power, and developers are looking for ways to reduce the distances that data has to move. That means bringing data and memory nearer to each other. “Hard drives didn't have enough data flow to cr... » read more

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