tag: Mentor Graphics

Experts At The Table: Multipatterning
By Ed Sperling - 20 Jul, 2012 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael White, physical verification product line manager at Mentor Graphics; Luigi Capodieci, R&D fellow at GlobalFoundries; Lars Liebmann, IBM distinguished engineer; Rob Aitken, ARM fellow; Jean-Pierre Geronimi, CAD director at STMicroelectronics; and Kuang-Kuo Lin, director of foundry design enablement at Samsung Ele... » read more

Four Factors Driving Processor Choices
By Ed Sperling - 12 Jul, 2012 - Comments: 0

By Ed Sperling Choosing processors for an SoC, a system-in-package, or even a complete system is becoming much more difficult, and the challenge is growing as demands on performance, power, area and time to market continue to increase. There are many reasons why this is becoming more difficult—and some designs will require more tradeoffs than others, depending upon IP re-use or a particul... » read more

Dealing With Variability
By Barry Pangrle - 12 Jul, 2012 - Comments: 0

By Barry Pangrle Process, voltage and temperature, a.k.a. PVT, are well known to designers who are working to complete “signoff” for their designs. In order for a design to be production-ready, it’s necessary to ensure that the design is going to yield parts at a sufficiently high percentage for profitability and that it will still operate within the expected variation of the process and... » read more

Bubble Gum and Scotch Tape
By Ann Mutschler - 12 Jul, 2012 - Comments: 0

It’s always extremely interesting to talk with actual design engineers, trudging through the trenches of challenges like 3D design. Recently, I was able to speak with Robert Patti, chief technology officer, vice president of design engineering and a director at Tezzaron Semiconductor. The company has been putting 3D designs together for quite some time so I expected to hear that they are u... » read more

Monsters, Inc.: How Do I Fix These Double Patterning Errors Anyway?
By David Abercrombie - 29 Jun, 2012 - Comments: 0

By David Abercrombie Just mention double patterning (DP) to designers, and you can see the fear in their eyes. There is real trepidation about what kind of monster DP design debugging will be. In this article, I hope to alleviate some of that trepidation by educating you on manual correction techniques, automated fixing hints, and automated fixing capabilities you can adopt to help you with DP... » read more

Experts At The Table: Improving The Efficiency Of Software
By Ed Sperling - 29 Jun, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Design sat down to talk about how to write better software with Jan Rabaey, Donald O. Pederson Distinguished Professor at the University of California at Berkeley; Barry Pangrle, solutions architect for low-power design and verification at Mentor Graphics; Emily Shriver, research scientist at Intel; Alan Gibbons, principal engineer at Synopsys; and Dav... » read more

Emulation’s Winding Path To Success
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ed Sperling Emulation was developed for verifying complex ICs when simulation was considered too slow. After more than a decade of very slow growth, however, sales have begun to ramp. There are several reasons for this shift. First, SoCs simply are becoming more complex, and the amount of verification that needs to be done to get a chip out the door can bring simulation to a crawl. Desig... » read more

Leveraging The Past
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler It’s easy to forget that not every design today is targeted at 20nm, given the amount of focus put on the bleeding edge of technology. But in fact a large number of designs utilize the stability and reliability of older manufacturing nodes, as well as lower mask costs, by incorporating new design and verification techniques, with 2.5D designs being a prime example. ... » read more

The Trouble With Models
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler Models and modeling concepts seem to be on the tip of every tongue these days. Once the promise of sparking true ESL design, the use of system-level models has settled into something more like enabling software development. There is also talk of leveraging models across the supply chain, but is this really possible yet? The concept of doing this incremental refinem... » read more

Merger In Progress
By Jon McDonald - 28 Jun, 2012 - Comments: 0

By Jon McDonald June's been an interesting month, I was at the Design Automation Conference, DAC, in San Francisco, then a week later, the Freescale Technology Forum, FTF. DAC is generally more of a hardware design conference, while FTF generally is a bit more focused on software and systems. This year I was surprised at the similarities in some of the discussions at both shows. At DAC ther... » read more

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