tag: Mentor Graphics

Collaboration Grows
By Ed Sperling - 20 Oct, 2011 - Comments: 0

By Ed Sperling A series of recent announcements by the Big Three EDA vendors and their well-known partners from across the disaggregated SoC ecosystem is lending new credence to the impact of collaboration. While IDMs such as Apple, Intel, Samsung and IBM continue to blaze their own trail, developing in-house tools, methodologies, processes and chips, fabless companies working with foundrie... » read more

Revelations From Italy
By Jon McDonald - 20 Oct, 2011 - Comments: 0

By Jon McDonald I am just back from vacation. My wife and I spent two weeks in Italy. While there we toured the Tuscan countryside, Florence and Rome. We had a rental car for the time in Tuscany. In Rome we didn’t keep the car. Watching the different types of cars and the way they were driven gave me a good analogy for an issue I’ve had a number of discussions on. As people think about ... » read more

The Genealogy of DFM
By David Abercrombie - 07 Oct, 2011 - Comments: 0

By David Abercrombie Family histories are all the rage these days. With the advent of online databases, what was once a difficult and expensive task is now accessible to anyone with Internet access. Not only can you investigate census data, immigration records, and military service records with ease, but some sites also allow you to access information compiled by other site members. All of a... » read more

Redefining Systems Around Power
By Ed Sperling - 06 Oct, 2011 - Comments: 0

By Ed Sperling Engineers have been talking about system-level power budgets since Moore’s Law reached 65nm, but as power becomes a critical element of any design with or without a plug the definition of what constitutes a system is changing. While most SoC engineers think of the system as an IC, power increasingly is playing a significant role in the subsystem, and even in the larger syst... » read more

Thermal Modeling Held Back By Outdated Standards
By Ed Sperling - 06 Oct, 2011 - Comments: 0

By Ann Steffora Mutschler As the reality of true 3D IC design nears, engineering teams are keen to manage the heat between the stacked die in order to avoid catastrophic failures. Thermal modeling tops the roster of techniques to leverage in this area. Herve Jaouen, director of modeling and simulation in STMicroelectronics’ technology R&D organization, explained that in 3D designs the... » read more

Energy Vs. Power
By Ed Sperling - 06 Oct, 2011 - Comments: 0

By Ann Steffora Mutschler The terms power and energy are used almost interchangeably these days, but understanding and clearly articulating how to optimize embedded designs for maximum energy and power efficiency can make a big difference in a design. At a physics level, energy = power x time, whereas power is the rate of energy in a given time window. When the focus is specifically power, ... » read more

The Hidden Costs Of Test
By Ed Sperling - 06 Oct, 2011 - Comments: 0

By Ed Sperling As complexity grows in SoCs, so does the ability to accurately test them. That helps explain why there are so many different types of tests and so much confusion about what to use to perform those tests, when to test, and where in the flows to include those tests. But what’s less well known is that tests done improperly also can give false results, labeling good chips as bad�... » read more

Intel’s Claremont Near-Threshold Voltage IA Core
By Barry Pangrle - 06 Oct, 2011 - Comments: 0

By Barry Pangrle Intel announced many new technologies at its recent Intel Developer Forum (IDF) held from Sept. 13-15 in San Francisco, but the one announcement that jumped out at me was the unveiling of its work on a near-threshold voltage (NTV) processor named “Claremont.” For this exercise, Intel chose an older Pentium design to help minimize the number of variables the engineers would... » read more

Are We There Yet?
By Ann Mutschler - 06 Oct, 2011 - Comments: 0

We’ve been talking in the industry for as long as I can remember about hardware and software co-design and I’m always curious to hear how that it progressing….or not. I posed this question to Jon McDonald, technical marketing engineer in Mentor Graphics’ design creation synthesis group who is constantly in touch with engineering teams. His take is that hardware and software teams are... » read more

Solid Verification Methodology Essential To Productivity
By Ann Mutschler - 22 Sep, 2011 - Comments: 0

Verifying SoCs from a functional perspective pushes the limits of already lean resources, driving verification teams to seek out new ways to improve productivity of verification tasks. Of course, with the verification task being a time-bound one, the challenge is daunting. It is well understood that consumer electronics is pushing the technology envelope in terms of the amount of technology ... » read more

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