New Innovative Way To Functionally Verify Heterogeneous 2D/3D Package Connectivity


Historically, IC package design has been a relatively simple task which allowed the die bumps to be fanned out to a geometry suitable for connecting to a printed circuit board. The package netlist was often captured by the package designer, typically using Excel to manually assign net names to the desired die bumps and BGA balls to achieve the intended connection. Modern package and interpos... » read more

Blog Review: Mar. 12


Cadence's P. Saisrinivas explains the relationship between drive strength and cell delay and why it is key to choose the appropriate drive strength to meet timing constraints while minimizing power and area. Siemens' Daniel Berger and Dirk Hartmann tackle the readout problem of accurately measuring the state of a quantum system after it has undergone a quantum computation, which becomes incr... » read more

Automation And AI Improve Failure Analysis


When a chip malfunctions it’s the job of the failure analysis engineer to determine how it failed or significantly deviated from its key performance metrics. The cost of failure in the field can be huge in terms of downtime, recalls, damage to a company’s reputation, and more. For these reasons, chipmakers take customer returns very seriously, focusing resources to quickly get to the bot... » read more

Unlocking The Value Of Yield


Have you stopped to consider the impact of yield on your overall product cost? Of course you did, when you considered your yield targets and set your product goals. But is it good enough to stop once the goals are achieved, or should you find ways to drive additional value into your organization once production has begun? What is the value of a 1% improvement in product yield? The short answer ... » read more

Reversible Chain Diagnosis


For advanced technologies, the industry is seeing very complicated silicon defect types and defect distribution. One consequence is that scan chain diagnosis becomes more difficult. To improve the resolution of scan chain diagnosis, Tessent Diagnosis can use new scan chain test patterns to leverage a reversible scan chain architecture. This paper describes the novel scan chain architecture t... » read more

Failure To Launch


Failure analysis (FA) is an essential step for achieving sufficient yield in semiconductor manufacturing, but it’s struggling to keep pace with smaller dimensions, advanced packaging, and new power delivery architectures. All of these developments make defects harder to find and more expensive to fix, which impacts the reliability of chips and systems. Traditional failure analysis techniqu... » read more

Chip Industry Week In Review


The Malaysian government signed a deal with Arm to kickstart a chip design ecosystem. Until now, Malaysia has focused on packaging and test. Adding chip design represents a major change in focus. The country will pay SoftBank $250 million over 10 years for Arm’s chip design IP and train 10,000 engineers. Global chip sales reached $56 billion in January, up nearly 18% from the same period i... » read more

Shift-Left Pattern Matching Boosts Automotive IC Quality And Time-To-Market


As the automotive industry races towards a future of connected, autonomous, and electrified vehicles, the complexity of integrated circuits (ICs) powering these innovations is reaching unprecedented levels. Modern automotive ICs incorporate a diverse mix of custom and third-party intellectual property (IP), each with unique performance requirements that must be meticulously verified to ensure f... » read more

Software-Defined Radar Is First Leap On SDV Path


Software-defined vehicles (SDVs) have had car company marketers in a veritable tizzy for several years, and while they generally agree on the direction, they differ on the speed and route to adoption. For most OEMs, a wholesale change in vehicle architecture, from hood ornament to trunk-latch, is easier said than done. Legacy systems, both hardware and software, are the millstone around OEMs... » read more

Shift Left With Calibre Pattern Matching


As integrated circuit (IC) designs become increasingly complex, early-stage verification is crucial to ensure productivity and quality in design processes. The "shift left" verification approach, enabled by Siemens’ Calibre nmPlatform, helps IC design teams to identify and resolve critical issues much earlier in the design cycle. As part of the shift left platform, Calibre Pattern Matching... » read more

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