Using Virtual Metal Fill To Predict The Impact Of High Level Nets

A recent blog post discussed the use of virtual metal fill (VMF) to predict the effects of real metal fill when performing RC extraction on a chip layout. This enables static timing analysis (STA) closely correlated with final post-fill results without incurring the time to perform the actual metal fill insertion during the layout-STA loop. VMF is fast enough to be run in every iteration of thi... » read more

Using Virtual Metal Fill To Solve Real Design Problems

People learning about semiconductor manufacturing might well be confused by the concept of metal fill. It seems perfectly intuitive that laying out a complex chip will result in some regions with fewer transistors and metal interconnect than others. It makes sense that there will be areas that are mostly empty. So why spend money on more complicated masks and on extra metal just to fill those e... » read more

Eco-Friendly Strategy

By Jeff Wilson If you want a winning fill solution at 20nm, you need a robust ecosystem in place with three main players. Each player has a specific role and, particularly as the new technology is defined, the players need to work in close partnership. Why is the ecosystem so important at 20nm? Because of the technological challenges, including process variability and design complexity. The... » read more