tag: Methodics

The Early Bird Gets More Secure Hardware
By Rob van Blommestein - 02 Sep, 2021 - Comments: 0

I’m sure you’ve heard the expression “The early bird gets the worm.” This proverb emphasizes the importance of starting something early to maximize the potential outcome. In terms of hardware security, this idiom is spot on. Cybersecurity shouldn’t only be about protecting the software from attacks. Hardware is just as important. Cyberattacks continue to advance significantly, prog... » read more

Week In Review: Design, Low Power
By Jesse Allen - 24 Jul, 2020 - Comments: 0

Perforce Software acquired Methodics. Founded in 2006 and based in San Francisco, Methodics' IP lifecycle management and traceability software will join Perforce's larger portfolio of DevOps software that includes version control, Agile planning, and static code analysis. The two companies have had a strategic partnership in place with customers using software from both companies. Terms of the ... » read more

CDNLive 2019: The Verification Ecosystem Is Growing Stronger And Stronger
By Frank Schirrmeister - 25 Apr, 2019 - Comments: 0

Ecosystems are not only fascinating when it comes to processors like Arm, MIPS, x86, and RISC-V (as I have written before) or for semiconductor technologies like TSMC, GLOBALFOUNDRIES, and Samsung; they are key for success in verification as well. CDNLive Silicon Valley was, again, a great example of the verification ecosystem in action. It showcased the different engines verification tools run... » read more

Experts At The Table: IP
By Ed Sperling - 23 Mar, 2012 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to talk about IP with John Goodenough, vice president of design technology and automation at ARM; Simon Butler, CEO of Methodics; Navraj Nandra, senior director of marketing for DesignWare analog and mixed signal IP at Synopsys, and Neil Hand, product marketing group director at Cadence. What follows are excerpts of that discussion. LPE: The su... » read more

SoCs Go Mainstream
By Ed Sperling - 22 Mar, 2012 - Comments: 0

By Ed Sperling The monolithic ASIC, which has been the bread-and-butter of chipmakers for decades, is giving way to systems on a chip among mainstream chipmakers and at mainstream process nodes. This shift has been overhyped, overpromised and slow to materialize. While SoCs have been common for years in mobile electronics and for high-performance platforms such as gaming consoles, they have... » read more

Experts At The Table: IP
By Ed Sperling - 16 Mar, 2012 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to talk about IP with John Goodenough, vice president of design technology and automation at ARM; Simon Butler, CEO of Methodics; Navraj Nandra, senior director of marketing for DesignWare analog and mixed signal IP at Synopsys, and Neil Hand, product marketing group director at Cadence. What follows are excerpts of that discussion. LPE: Are w... » read more

Experts At The Table: IP
By Ed Sperling - 08 Mar, 2012 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to talk about IP with John Goodenough, vice president of design technology and automation at ARM; Simon Butler, CEO of Methodics; Navraj Nandra, senior director of marketing for DesignWare analog and mixed signal IP at Synopsys, and Neil Hand, product marketing group director at Cadence. What follows are excerpts of that discussion. LPE: Where ... » read more

Market Catches Up With Verification IP
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Ed Sperling Ever since verification IP was introduced it was seen as something that should be given away with purchased IP. The result was limited investment by IP vendors, frustration on the part of IP customers, and a market opportunity that nearly fizzled before it even began. But as the amount of commercially developed IP content continues to grow in ICs, the potential interactions ... » read more

Reverse Engineering
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ed Sperling Fabs and foundries frequently have been the savior of flawed designs, fixing problems such as power and performance, identifying design issues and often developing solutions to those problems. Over the next couple of process nodes, and in stacked die that will span multiple processes, there will be far fewer saves coming from the back end. Double and triple patterning, stress... » read more

Too Many Standards, But Still Not Enough
By Ed Sperling - 15 Dec, 2011 - Comments: 0

By Ed Sperling The semiconductor industry has been one of the most prolific sectors in history when it comes to generating standards. Talk to any design engineer facing time-to-market pressures, new packaging approaches, and a mindboggling number of merchant IP, subsystems and interface requirements, and you’ll hear a compelling pitch for new standards. Talk to his or her boss and you’ll p... » read more

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