Tech Talk: 22nm FD-SOI

By Ed Sperling - 13 Jul, 2015 - Comments: 0

Subramani Kengeri, vice president of global design solutions at GlobalFoundries, discusses the evolution of 22nm FD-SOI and its advantages, including single patterning in the middle end of line, 0.4 volt operating voltage, and how it compares to finFETs in terms of performance. [youtube vid=5fa1AcIGcUw] » read more

Interconnect Challenges Grow

By Mark LaPedus - 20 Feb, 2014 - Comments: 0

Qualcomm outlined the technology challenges facing mobile chip suppliers at a recent event. In no particular order, the challenges include the usual suspects—area scaling, power reduction, performance and cost. Another concern for Qualcomm is an often-overlooked part of the equation—the backend-of-the-line (BEOL). In chip production, the BEOL is where the interconnects are formed within ... » read more

Front End Comes To The Back End

By Jeff Chappell - 19 Sep, 2013 - Comments: 0

By Jeff Chappell For outsourced assembly and test (OSAT) houses either planning for or already offering through-silicon via (TSV) capability for their 3D packaging efforts, this has meant the front end is coming to the back end, in a manner of speaking. A bit of an exaggeration perhaps, as most generalizations are. But thanks to TSVs, in a very real sense some of what would typically be the... » read more

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tag: middle end of line

Tech Talk: 22nm FD-SOI

Interconnect Challenges Grow

Front End Comes To The Back End

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