Americas Chip Funding Energizes Industry

By Liz Allan - 23 Oct, 2024 - Comments: 0

This is the second in a series of articles tracking government chip investments. See part one here (global), part 3 covering EMEA is here and Asia here. Since the first announcement of a non-binding preliminary memorandum of terms with BAE Systems in December 2023, the U.S. Department of Commerce has rolled out comprehensive plans to support more than a dozen companies in order to shore up... » read more

Research Bits: Oct. 22

By Jesse Allen - 22 Oct, 2024 - Comments: 0

3D-printed active electronics Researchers from MIT demonstrated fully 3D-printed semiconductor-free resettable fuses. Produced using standard 3D printing hardware and an inexpensive, biodegradable polymer filament doped with copper nanoparticles, the device can perform the same switching functions as the semiconductor-based transistors used for processing operations in active electronics. A... » read more

Chip Industry Technical Paper Roundup: Oct. 22

By Linda Christensen - 22 Oct, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=371 /] More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

Chip Industry Week In Review

By The SE Staff - 18 Oct, 2024 - Comments: 0

Arm joined forces with Korea's Samsung Foundry, ADTechnology, and Rebellions to create a CPU chiplet platform for AI training and inference. The new chiplet will be based on Samsung's 2nm gate-all-around technology. Intel and AMD, arch competitors for decades, formed an x86 ecosystem advisory group to collaborate on architectural interoperability and simplify software development. Samsung... » read more

3D-Printed Logic Gates and Resettable Fuses, Via Material Extrusion (MIT)

By Technical Paper Link - 17 Oct, 2024 - Comments: 0

A new technical paper titled "Semiconductor-free, monolithically 3D-printed logic gates and resettable fuses" was published by researchers at MIT. "This work reports the first active electronics fully 3D-printed via material extrusion, i.e. one of the most accessible and versatile additive manufacturing processes. The technology is proof-of-concept demonstrated through the implementation of ... » read more

Research Bits: Oct. 14

By Liz Allan - 14 Oct, 2024 - Comments: 0

Si-photonics chip emits beam of light MIT researchers developed a miniature, chip-based “tractor beam” that could help scientists study DNA, classify cells, and investigate the mechanisms of disease. The device uses a beam of light emitted by a silicon-photonics chip to manipulate particles millimeters away from the chip surface, while the sample remains sterile under its glass cover. T... » read more

Chip Industry Week In Review

By The SE Staff - 04 Oct, 2024 - Comments: 0

Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Research Bits: Oct. 1

By Liz Allan - 01 Oct, 2024 - Comments: 0

Rust-resistant coating for 2D semiconductors Researchers from Pennsylvania State University, National Yang Ming Chiao Tung University in Taiwan, Purdue University, Intel, and the Kurt J. Lesker Company developed a synthesis process to produce a rust-resistant coating with properties ideal for creating faster, more durable electronics. "One of the biggest issues that we see in 2D semiconduct... » read more

Chip Industry Technical Paper Roundup: Sept. 24

By Linda Christensen - 24 Sep, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Improving The Air-Stability and NBTI Reliability of BEOL CNFETs

By Technical Paper Link - 19 Sep, 2024 - Comments: 0

A new technical paper titled "Overcoming Ambient Drift and Negative-Bias Temperature Instability in Foundry Carbon Nanotube Transistors" was published by researchers at MIT, Stanford University, Carnegie Mellon University and Analog Devices. Abstract: "Back-end-of-line (BEOL) logic integration is emerging as a complementary scaling path to supplement front-end-of-line (FEOL) Silicon. Among ... » read more

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tag: MIT

Americas Chip Funding Energizes Industry

Research Bits: Oct. 22

Chip Industry Technical Paper Roundup: Oct. 22

Chip Industry Week In Review

3D-Printed Logic Gates and Resettable Fuses, Via Material Extrusion (MIT)

Research Bits: Oct. 14

Chip Industry Week In Review

Research Bits: Oct. 1

Chip Industry Technical Paper Roundup: Sept. 24

Improving The Air-Stability and NBTI Reliability of BEOL CNFETs

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