tag: MIT

Research Bits: Oct. 1
By Liz Allan - 01 Oct, 2024 - Comments: 0

Rust-resistant coating for 2D semiconductors Researchers from Pennsylvania State University, National Yang Ming Chiao Tung University in Taiwan, Purdue University, Intel, and the Kurt J. Lesker Company developed a synthesis process to produce a rust-resistant coating with properties ideal for creating faster, more durable electronics. "One of the biggest issues that we see in 2D semiconduct... » read more

Chip Industry Technical Paper Roundup: Sept. 24
By Linda Christensen - 24 Sep, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Improving The Air-Stability and NBTI Reliability of BEOL CNFETs
By Technical Paper Link - 19 Sep, 2024 - Comments: 0

A new technical paper titled "Overcoming Ambient Drift and Negative-Bias Temperature Instability in Foundry Carbon Nanotube Transistors" was published by researchers at MIT, Stanford University, Carnegie Mellon University and Analog Devices. Abstract: "Back-end-of-line (BEOL) logic integration is emerging as a complementary scaling path to supplement front-end-of-line (FEOL) Silicon. Among ... » read more

Research Bits: Sept. 3
By Jesse Allen - 03 Sep, 2024 - Comments: 0

3D printing of specialized antennas, sensors Researchers from the National University of Singapore developed a 3D printing technique that can be used to create three dimensional, self-healing electronic circuits. Called tension-driven CHARM3D, the technique enables the 3D printing of free-standing metallic structures without requiring support materials and external pressure. It uses Field�... » read more

Chip Industry Week in Review
By The SE Staff - 30 Aug, 2024 - Comments: 1

The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Chip Industry Technical Paper Roundup: August 13
By Linda Christensen - 13 Aug, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=249 /] More ReadingTechnical Paper Library home   » read more

Research Bits: Aug. 5
By Jesse Allen - 05 Aug, 2024 - Comments: 0

Measuring temperature with neutrons Researchers from Osaka University, National Institutes for Quantum Science and Technology, Hokkaido University, Japan Atomic Energy Agency, and Tokamak Energy developed a way to rapidly measure the temperature of electronic components inside a device using neutrons. The technique, called ‘neutron resonance absorption’ (NRA), examines neutrons being ab... » read more

Flexible-Wafer Platform And CMOS-Compatible 300mm Wafer-Scale Integrated-Photonics Fabrication
By Technical Paper Link - 03 Aug, 2024 - Comments: 0

A new technical paper titled "Mechanically-flexible wafer-scale integrated-photonics fabrication platform" was published by researchers at MIT and New York Center for Research, Economic Advancement, Technology, Engineering, and Science (NY CREATES). Abstract "The field of integrated photonics has advanced rapidly due to wafer-scale fabrication, with integrated-photonics platforms and fabric... » read more

Chip Industry Week in Review
By The SE Staff - 02 Aug, 2024 - Comments: 0

Okinawa Institute of Science and Technology proposed a new EUV litho technology using only four reflective mirrors and a new method of illumination optics that it claims will use 1/10 the power and cost half as much as existing EUV technology from ASML. Applied Materials may not receive expected U.S. funding to build a $4 billion research facility in Sunnyvale, CA, due to internal government... » read more

Formal Verification of Security Properties On RTL Designs
By Technical Paper Link - 27 Jul, 2024 - Comments: 0

A technical paper titled “RTL Verification for Secure Speculation Using Contract Shadow Logic” was published by researchers at Princeton University, MIT CSAIL, and EPFL. Abstract: "Modern out-of-order processors face speculative execution attacks. Despite various proposed software and hardware mitigations to prevent such attacks, new attacks keep arising from unknown vulnerabilities. Thus... » read more

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