Graphing Toward Standardization

By Brian Bailey - 24 Apr, 2014 - Comments: 0

Graph-based verification has become the hot topic of the day. It commanded a lot of attention at the recent DVCon, promises to fix many of the problems plaguing functional verification, can provide an automated way to perform system-level verification, enables portability of tests between simulation, emulation and prototyping, reduces the wastage created by constrained random test pattern gener... » read more

Abstractions: The Good, Bad And Ugly

By Ed Sperling - 27 Feb, 2014 - Comments: 0

Raising the level of abstraction has become almost a mantra among chipmakers and tools developers. By moving the vantage point up a couple rungs on the ladder, it’s easier to see how the individual parts of a design go together, to identify problems in the design as well as fixes to problems, and it all can happen much more quickly. That’s the theory, at least. And in most cases, it’s ... » read more

Plans Vs. Planning

By Jon McDonald - 20 Dec, 2013 - Comments: 0

The end of the year is a good time to look back at what’s happened over the past year, and look ahead to what might happen in the coming one. Two quotes that help my thought process when thinking about the might be coming, “Change is the law of life.” from Kennedy, and “Plans are nothing, but planning is indispensable” from Eisenhower. From my perspective, 2013 has been a good year... » read more

Making Modeling Less Unpleasant

By Brian Bailey - 19 Dec, 2013 - Comments: 1

How many times did your mother tell you to take your medicine? You knew two things: a) it would be unpleasant and b) it would be worth the few seconds of unpleasantness because of the benefits it would provide. It appears as if the electronics industry has the same issue with modeling. We talk about the benefits that having a system-level model would have — the ability to explore system archi... » read more

A Nobel Prize For Modeling And Simulation

By Brian Bailey - 24 Oct, 2013 - Comments: 0

This year, a Nobel Prize has been awarded for devising a computer model and simulation process. Bloomberg, which interviewed Marinda Wu by phone, said: “The models let us slow down…and let us look at them one piece at a time.” This enables them to optimize things. At this point you may be thinking one of three things. Either 1) I don’t remember that prize being awarded or, 2) at last ED... » read more

Divide, Abstract And Conquer

By Ed Sperling - 03 May, 2013 - Comments: 0

For years, the motto among design and verification engineers has been to look at the individual pieces of a design because it’s impossible to have a single tool or even an integrated collection of tools that can debug everything. That approach isn’t changing, but the method for getting there is. The driver behind this shift is a familiar one—growing complexity. Even platforms and subsy... » read more

Simple Economics

By Jon McDonald - 25 Apr, 2013 - Comments: 0

By Jon McDonald I was watching one of the MIT OpenCourseWare videos the other day. It was one of the lectures on Computer Science. I believe it was Prof. Robert Gallager who made a statement that really got me thinking: “Increasingly, system computational complexity has little impact on cost because of chip technology.” From a hardware perspective I initially had a bit of trouble with t... » read more

Experts At The Table: The Trouble With Low-Power Verification

By Ed Sperling - 22 Mar, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss low-power verification with Leah Clark, associate technical director at Broadcom; Erich Marschner, product marketing manager at Mentor Graphics; Cary Chin, director of marketing for low-power solutions at Synopsys; and Venki Venkatesh, senior director of engineering at Atrenta. What follows are excerpts of that conversat... » read more

Modeling Errors

By Ed Sperling - 28 Feb, 2013 - Comments: 0

Raising the abstraction level in increasingly large and complex design requires proxies. In IC world, we think of them in terms of higher abstractions, but the basic premise is that you can’t focus on ever detail without losing sight of the bigger picture, so we build models that can represent those details. Done well, these models are incredibly useful. They save time, make it easier to ... » read more

Achieving Fast And Accurate Extraction Of 3D-IC Layout Structures

By Various Writers - 26 Jul, 2012 - Comments: 0

The electronics industry is devoting a lot of energy to exploring “More than Moore’s Law” approaches that drive continued value scaling through system integration, rather than (or in addition to) shrinking transistors. One of the most promising techniques is the creation of 3D-ICs using TSV structures. However, accurately modeling a 3D multi-die system requires tools that extract precise ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: modeling