New Low-Temp Growth & Fabrication Technology Allowing Integration of 2D Materials Directly Onto A Silicon Circuit (MIT)

A new technical paper titled "Low-thermal-budget synthesis of monolayer molybdenum disulfide for silicon back-end-of-line integration on a 200 mm platform" was published by researchers at MIT, Oak Ridge National Laboratory, and Ericsson Research. According to this MIT news article: "Growing 2D materials directly onto a silicon CMOS wafer has posed a major challenge because the process u... » read more