tag: Moortec

Carmakers To Chipmakers: Where’s The Data?
By Ed Sperling And Susan Rambo - 24 Oct, 2018 - Comments: 0

The integration of electronics into increasingly autonomous vehicles isn't going nearly as smoothly as the marketing literature suggests. In fact, it could take years before some of these discrepancies are resolved. The push toward full autonomy certainly hasn't slowed down, but carmakers and the electronics industry are approaching that goal from very different vantage points. Carmakers and... » read more

Power Issues Grow For Cloud Chips
By Ann Mutschler - 11 Oct, 2018 - Comments: 0

Performance levels in traditional or hyperscale data centers are being limited by power and heat caused by an increasing number of processors, memory, disk and operating systems within servers. The problem is so complex and intertwined, though, that solving it requires a series of steps that hopefully add up to a significant reduction across a system. But at 7nm and below, predicting exactly... » read more

Aging In Advanced Nodes
By Ann Mutschler - 17 Sep, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; Magdy Abadir, vice president of marketing at ... » read more

5 Reasons Why In-Chip Monitoring Is Here To Stay
By Ramsay Allen - 13 Sep, 2018 - Comments: 0

When the first car rolled off his production line in 1913, Henry Ford would have already envisioned just how prolific the automobile would become. However, would he have foreseen the extent to which monitors and sensors would become critical to the modern internal combustion engine? The requirement for energy efficiency, power performance and reliability in high volume manufactured vehicles ... » read more

Minimizing Chip Aging Effects
By Brian Bailey - 13 Sep, 2018 - Comments: 2

Aging kills semiconductors, and it is a growing problem for an increasing number of semiconductor applications—especially as they migrate to more advanced nodes. Additional analysis and prevention methods are becoming necessary for safety critical applications. While some aspects of aging can be mitigated up front, others are tied to the operation of the device. What can an engineering tea... » read more

Week In Review: Design, Low Power
By Jesse Allen - 07 Sep, 2018 - Comments: 0

Cadence teamed up with nine PCB manufacturing partners on an ecosystem to provide easier access to partners' technology files to improve PCB manufacturability. The program, DesignTrue DFM, allows for automated import of a manufacturer's latest DFM rules as well as rule checking in real time as part of the PCB layout process. The nine initial PCB manufactures supporting the program are: Bay Area... » read more

Chip Aging Becomes Design Problem
By Brian Bailey - 09 Aug, 2018 - Comments: 9

Chip aging is a growing problem at advanced nodes, but so far most design teams have not had to deal with it. That will change significantly as new reliability requirements roll out across markets such as automotive, which require a complete analysis of factors that affect aging. Understanding the underlying physics is critical, because it can lead to unexpected results and vulnerabilities. ... » read more

Process Variation Not A Solved Issue
By Ann Mutschler - 09 Aug, 2018 - Comments: 4

Semiconductor Engineering sat down to talk about process variation in advanced nodes, and how design teams are coping, with Christoph Sohrmann, a member of the Advanced Physical Verification group in Fraunhofer’s Division of Engineering of Adaptive Systems (EAS); Juan Rey, vice president of engineering at Mentor, A Siemens Business; and Stephen Crosher, CEO of Moortec Semiconductor. What foll... » read more

On-Chip Monitoring Of FinFETs
By Ed Sperling - 25 Jul, 2018 - Comments: 0

Stephen Crosher, CEO of Moortec, sat down with Semiconductor Engineering to discuss on-chip monitoring and its impact on power, security and reliability, including predictive maintenance. What follows are excerpts of that conversation. SE: What new problems are you seeing in design? Crosher: There are challenges emerging for companies working on advanced nodes, including scaling and trans... » read more

Explaining Adaptive Voltage Scaling And Dynamic Voltage Frequency Scaling
By Ramsay Allen - 17 Jul, 2018 - Comments: 0

A Q&A with Moortec CTO Oliver King. What exactly do we mean by Adaptive Voltage Scaling versus Dynamic Voltage Frequency Scaling? Adaptive Voltage Scaling (AVS) involves the reduction of power by changing the operating conditions within an ASIC in a closed loop. Dynamic Voltage Frequency Scaling (DVFS), on the other hand, is a power management technique where the voltage is increased ... » read more

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