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Power Issues Rising For New Applications


Managing power in chips is becoming more difficult across a wide range of applications and process nodes, forcing chipmakers and systems companies to rethink their power strategies and address problems much earlier than in the past. While power has long been a major focus in the mobile space, power-related issues now are spreading well beyond phones and laptop computers. There are several re... » read more

Power Hungry?


Rapid changes in SoC power issues have forced a rethinking of methodologies throughout the design flow to account for power-related effects. At 65 nanometer process nodes and below, leakage power and dynamic power consumption make it increasingly difficult to meet power budgets. Achieving timing and signal integrity closure is now tightly coupled with power optimization and power net distributi... » read more

Power Hungry?


Rapid changes in SoC power issues have forced a rethinking of methodologies throughout the design flow to account for power-related effects. At 65 nanometer process nodes and below, leakage power and dynamic power consumption make it increasingly difficult to meet power budgets. Achieving timing and signal integrity closure is now tightly coupled with power optimization and power net distributi... » read more

Advanced Dynamic Power Reduction Techniques


Rapid changes in SoC power issues have forced a rethinking of methodologies throughout the design flow to account for power-related effects. At 65 nanometer process nodes and below, leakage power and dynamic power consumption make it increasingly difficult to meet power budgets. Achieving timing and signal integrity closure is now tightly coupled with power optimization and power net distributi... » read more