Week In Review: Semiconductor Manufacturing, Test

By Karen Heyman - 22 Dec, 2022 - Comments: 0

SEMI , SEMI Europe and European Commission representatives, in consultation with semiconductor industry stakeholders, proposed initiatives to overcome the skills shortage in Europe’s microelectronics industry: Create an industry image campaign to raise public awareness on how technology is shaping the future, and how workers can establish careers in the semiconductor industry. Remove ... » read more

Chip Industry’s Technical Paper Roundup: Dec. 20

By Linda Christensen - 20 Dec, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=71 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us po... » read more

Automatic Layout Generator Targeting Region-based Layouts for Advanced FinFET-Based Full-Custom Circuits (UT Austin/NVIDIA)

By Technical Paper Link - 15 Dec, 2022 - Comments: 0

A technical paper titled "AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies" was published by researchers at UT Austin and NVIDIA. "This paper presents AutoCRAFT, an automatic layout generator targeting region-based layouts for advanced FinFET-based full-custom circuits. AutoCRAFT uses specialized place-and-route (P&R) algorithms to handle various design cons... » read more

Week In Review: Manufacturing, Test

By Karen Heyman - 09 Dec, 2022 - Comments: 2

The more than 1,400 attendees at this week’s IEDM, which celebrated the 75th anniversary of the transistor, were clearly focused on making the next 75 years of semiconductors even more remarkable than the last. Intel, Samsung, TSMC, STMicroelectronics, GlobalFoundries and imec announced breakthrough devices, materials, and even integration approaches. These included: Intel showcased adva... » read more

IC Stresses Affect Reliability At Advanced Nodes

By Ann Mutschler - 08 Dec, 2022 - Comments: 1

Thermal-induced stress is now one of the leading causes of transistor failures, and it is becoming a top focus for chipmakers as more and different kinds of chips and materials are packaged together for safety- and mission-critical applications. The causes of stress are numerous. In heterogeneous packages, it can stem from multiple components composed of different materials. “These materia... » read more

Chip Industry’s Technical Paper Roundup: Dec. 5

By Linda Christensen - 05 Dec, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=67 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for u... » read more

Cybersecurity Risks Of Automotive OTA

By John Koon - 01 Dec, 2022 - Comments: 0

Modern vehicles increasingly resemble supercomputers on wheels, with many electronic control units (ECUs) networked together as increasingly sophisticated software is installed and updated. Similar to smartphones, vehicle OEMs will contact vehicle owners remotely about operating system updates that add new features and/or fixes, as well as software bugs and vulnerabilities. But all of this h... » read more

Why Better Mapping Technology Is Critical To Autonomous Vehicles

By John Koon - 01 Dec, 2022 - Comments: 0

Autonomous cars find the way to their destination using a number of critical technologies, including some version of a global position system and a central brain to interpret that and other data. But many of those technologies are not reliable or accurate enough today, and may not be for years to come. There are numerous reports of vehicles missing their stop, or trucks being guided into all... » read more

Using Sparseloop in Hardware Accelerator Design Flows (MIT)

By Technical Paper Link - 30 Nov, 2022 - Comments: 0

A technical paper titled "Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling" was published by researchers at MIT and NVIDIA. The paper won "Distinguished Artifact Award" at the MICRO 2022 conference. Find the technical paper here. Published 2022. Project website is here and github here. Abstract: "In recent years, many accelerators have been proposed to effici... » read more

Chip Industry’s Technical Paper Roundup: Nov. 29

By Linda Christensen - 29 Nov, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /] Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

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Knowledge Centers
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Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

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Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

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AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Megafabs churning out the most advanced processors are not the only game in town.

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tag: Nvidia

Week In Review: Semiconductor Manufacturing, Test

Chip Industry’s Technical Paper Roundup: Dec. 20

Automatic Layout Generator Targeting Region-based Layouts for Advanced FinFET-Based Full-Custom Circuits (UT Austin/NVIDIA)

Week In Review: Manufacturing, Test

IC Stresses Affect Reliability At Advanced Nodes

Chip Industry’s Technical Paper Roundup: Dec. 5

Cybersecurity Risks Of Automotive OTA

Why Better Mapping Technology Is Critical To Autonomous Vehicles

Using Sparseloop in Hardware Accelerator Design Flows (MIT)

Chip Industry’s Technical Paper Roundup: Nov. 29

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