Machine Learning Shifts More Work to FPGAs, SoCs


A wave of machine-learning-optimized chips is expected to begin shipping in the next few months, but it will take time before data centers decide whether these new accelerators are worth adopting and whether they actually live up to claims of big gains in performance. There are numerous reports that silicon custom-designed for machine learning will deliver 100X the performance of current opt... » read more

Enabling Cheaper Design


While the EDA industry tends to focus on cutting edge designs, where design costs are a minor portion of the total cost of product, the electronics industry has a very long tail. The further along the tail you go, the more significant design costs become as a percent of total cost. Many of those designs are traditionally built using standard parts, such as microcontrollers, but as additional... » read more

Blog Review: Sept. 12


Cadence's Paul McLellan checks out the impact the Meltdown, Spectre, and Foreshadow vulnerabilities will have on future processor design with an overview of speculative execution and why it's important to current architectures. Mentor's Matthew Ballance suggests some ways to find existing information and descriptions that can be used to jump-start the creation of portable stimulus models. ... » read more

Cracking The Auto IC Market


The market for automotive electronics is booming, and it has set off a global scramble among established chipmakers and startups. What's becoming clear, though, is that not everyone understands just how different automotive is from the mobile market. Mobile is still the highest-volume market for semiconductors, but the growth has flattened. In contrast, the value of the automotive electronic... » read more

Processing In Memory


Adding processing directly into memory is getting a serious look, particularly for applications where the volume of data is so large that moving it back and forth between various memories and processors requires too much energy and time. The idea of inserting processors into memory has cropped up intermittently over the past decade as a possible future direction, but it was dismissed as an e... » read more

Blog Review: Aug. 29


Mentor's Joe Hupcey III addresses inconclusive results in formal verification with tips on how to reduce the complexity of “assumption” properties to make them easier for the formal engines to digest and reach a solution. Cadence's Meera Collier looks beyond the immediate appeal of autonomous cars to the broader social implications of urban sprawl, public transit funding, and gentrificat... » read more

Week In Review: Design, Low Power


Wafer company Soitec and European missile manufacturer MBDA joined together to buy the assets of Dolphin Integration. The IP and EDA tool provider, founded in 1985 in Grenoble, France, has been struggling, recently concluding insolvency proceedings and going into receivership. The new joint venture will absorb Dolphin's 155 employees and be owned 60% by Soitec, 40% by MBDA. The two companies co... » read more

Week in Review: IoT, Security, Auto


Internet of Things Arm uncorked its first forward-looking CPU roadmap and performance numbers for client computing. The company said it expects to deliver annual performance improvements of more than 15% per year through 2020. The targeted market includes 5G, always-on, always-connected devices. C3 IoT will work with Google Cloud to support artificial intelligence and Internet of Things dep... » read more

Gaps In Verification Metrics


As design complexity has exploded, the verification effort has likewise grown exponentially, with many different types of verification being applied to different classes of design. A recent panel discussion with leading chipmakers examined this topic in an effort to shed light on design health and quality, measuring the success of verification, knowing when verification is complete, being on... » read more

Big Changes For Mainstream Chip Architectures


Chipmakers are working on new architectures that significantly increase the amount of data that can be processed per watt and per clock cycle, setting the stage for one of the biggest shifts in chip architectures in decades. All of the major chipmakers and systems vendors are changing direction, setting off an architectural race that includes everything from how data is read and written in m... » read more

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