Full-Chip Power Integrity And Reliability Signoff


As designs increase in complexity to cater to the insatiable need for more compute power — which is being driven by different AI applications ranging from data centers to self-driving cars—designers are constantly faced with the challenge of meeting the elusive power, performance and area (PPA) targets. PPA over-design has repercussions resulting in increased product cost as well as pote... » read more

Blog Review: Nov. 8


Synopsys' Eric Huang digs in to what's new with USB 3.2 and what's achieved by preserving the existing PHY signaling speeds. In a video, Mentor's Colin Walls provides tips on how to write debuggable and maintainable embedded code. Cadence's Paul McLellan listens in on a talk by Andrew Kahng of UC San Diego on the problem of scaling and why machine learning can improve EDA tools. Rambus... » read more

Blog Review: Nov. 1


Mentor's Nitin Bhagwath continues digging into DDR timing with a look at the clock-to-DQS requirement at the DRAM and how "write-leveling" is used to solve layout issues caused by the requirement. Synopsys' Dipesh Handa checks out what's new in the MIPI CSI-2 v2.0 specification that opens it up to new imaging and vision applications, including IoT and automotive. Cadence's Ken Willis delv... » read more

Making Machine Learning Portable


Machine learning is everywhere, and it has exploded at a pace no one would have expected. Even a year ago, ML was more of an experiment than a reality. NVIDIA's stock price (Fig. 1, below) is a good representation of just how quickly this market has grown. GPUs are the chip of choice for training machine learning systems. Fig. 1: Nvidia 5-year stock price. Source: Google Finance Ma... » read more

Blog Review: Oct. 11


Mentor's Matthew Balance examines the separation of concerns between test intent and test realization in the Portable Stimulus specification. Synopsys' Deepak Nagaria checks out the features that makes LPDDR4 efficient in terms of power consumption, bandwidth utilization, data integrity and performance. Cadence's Meera Collier listens in as Chris Rowen considers whether AI processing shou... » read more

Toward System-Level Test


The push toward more complex integration in chips, advanced packaging, and the use of those chips for new applications is turning the test world upside down. Most people think of test as a single operation that is performed during manufacturing. In reality it is a portfolio of separate operations, and the number of tests required is growing as designs become more heterogeneous and as they ar... » read more

Getting A Standard Right The First Time


The development of standards is a tricky balance, especially when going into areas that are nascent. The [getentity id="22863" e_name="Portable Stimulus Standard"] (PSS), being developed within [getentity id="22028" e_name="Accellera"] is one of those. This could be the most important standard since [gettech id="31017" comment="Verilog"] and [gettech id="31040" comment="VHDL"]. And if there ... » read more

LiDAR Market Continues To Percolate


Light imaging, detection, and ranging (LiDAR) sensors are still dazzling investors and technologists. They are chasing after the technology for automotive applications, while also keeping an eye on LiDAR for drones, industrial automation, mapping, and robotics, among other uses. It’s too early to tell how market share for automotive LiDAR is shaping up, as the bigger vendors are still work... » read more

Blog Review: Sept. 13


Mentor's Andrew Macleod points to some important things to consider when beginning an automotive IC project and why differentiation, not commoditization, should be the goal. Synopsys' Amit Paunikar examines the architecture changes that make LPDDR4 faster while consuming less power. Cadence's Paul McLellan shares highlights from CDNLive Boston, from the latest in silicon photonics to how ... » read more

Portable Stimulus Status Report


The first release of the Portable Stimulus (PS) standard is slated for early next year. If it lives up to its promise, it could be the first new language and abstraction for verification in two decades. [getentity id="22028" e_name="Accellera"] uncorked the PS Early Adopter release at the Design Automation Conference (DAC) in June. The standard has been more than two years in the making by t... » read more

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