tag: Nvidia

Experts At The Table: Latency
By Ed Sperling - 25 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Shaking Up The Green500
By Barry Pangrle - 17 Jan, 2013 - Comments: 0

Barry Pangrle Last September, I wrote about the efficiency of IBM’s Power7+ architecture in my blog. IBM’s Sequoia supercomputer (a BlueGene/Q system) this past June had just shot to the top of the Supercomputing Top500 chart, clocking in at 16.32 petaflop/s on the Linpack benchmark. Other systems built around the IBM BlueGene/Q, Power BQC 16C 1.60GHz, Custom were also dominating the top o... » read more

Experts At The Table: Latency
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Welcome To The ‘Probably Good Die’ Era
By Mark LaPedus - 13 Dec, 2012 - Comments: 0

By Mark LaPedus In today’s systems, consumers want more performance and bandwidth with a longer battery life. Some chip segments are keeping up with the demands. Still other areas are falling way behind the curve. Battery life is an obvious problem, but memory bandwidth is under the radar. “Initially, memory bandwidth nearly doubled every two years, but this trend has slowed over the pa... » read more

Thinking Small
By Barry Pangrle - 06 Dec, 2012 - Comments: 0

By Barry Pangrle “But I am not afraid to consider the final question as to whether, ultimately—in the great future—we can arrange the atoms the way we want; the very atoms, all the way down! What would happen if we could arrange the atoms one by one the way we want them (within reason, of course; you can't put them so that they are chemically unstable, for example). — Richard Feynman, ... » read more

Node Skipping Reaches New Heights
By Ed Sperling - 15 Nov, 2012 - Comments: 0

By Mark LaPedus For years, silicon foundries have rolled out their respective leading-edge processes roughly on a two-year cadence. The long-standing goal has been to keep foundry customers on a competitive price, power and performance curve. But as leading-edge chipmakers move from the 28nm node and beyond, the predictable process progression is changing. And the phenomenon of “node skip... » read more

Keeping The Balance
By Ed Sperling - 13 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler The brains of datacenters today are more powerful than ever due to technology advancements in chip architectures and in manufacturing processes that allow more processing power thanks to Moore’s Law. But knowing exactly how and where to configure the processors and cores for optimum throughput and performance within a certain power budget raises a number of qu... » read more

Firms Rethink Fabless-Foundry Model
By Ed Sperling - 31 Jul, 2012 - Comments: 0

By Mark LaPedus As chipmakers move toward 20nm designs, finFETs and 3D stacked devices, the industry is beginning to re-think the fabless-foundry model. Leading-edge foundries are finally getting serious about the “virtual IDM” model, in which vendors will act more like integrated device manufacturers (IDMs), as opposed to being mere production partners. In this model, the found... » read more

Experts At The Table: Hardware-Software Co-Design
By Ed Sperling - 11 May, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss hardware-software co-design with Frank Schirrmeister, group marketing director for Cadence’s System and Software Realization Group; Shabtay Matalon, ESL market development manager at Mentor Graphics; Kurt Shuler, vice president of marketing at Arteris; Narendra Konda, director of hardware engineering at Nvdia; and Jack Greenbaum, direct... » read more

Experts At The Table: Hardware-Software Co-Design
By Ed Sperling - 04 May, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss hardware-software co-design with Frank Schirrmeister, group marketing director for Cadence’s System and Software Realization Group; Shabtay Matalon, ESL market development manager at Mentor Graphics; Kurt Shuler, vice president of marketing at Arteris; Narendra Konda, director of hardware engineering at Nvdia; and Jack Greenbaum, directo... » read more

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