Design For Always-On


Designing for low power is such an interesting area because, while it might be frustrating, one size — or approach, in this case — does not fit all. It is a balancing act to weigh the design objectives against what is possible in the process. NXP, which launched a series of low power MCUs today aimed at the sensor-processing market, has been focusing on optimizing power consumption f... » read more

Blog Review: Nov. 5


Cadence's Brian Fuller zeroes in on ISO 26262, the automotive safety standard that's supposed to guard against nightmare failures in your car. Hopefully it works. They won't protect against cyber terrorism, though. Rambus' Aharon Etengoff takes a look at the challenges of connected vehicles. Mentor's J. Van Domelen looks at NASA's increased reliance on commercial partners, which has not b... » read more

The Week In Review: Design


Tools Mentor Graphics rolled out an extension to its PCB design platform that allows for synchronization of processes across multi-board systems. The new tool captures logic and system definitions for boards, cables, backplanes, cable assemblies, sensors and actuators. Cadence introduced a dynamic characterization solution for mixed signal blocks such as PLLs, data converters, high-speed tr... » read more

Securing The IoT


Semiconductor Engineering sat down to discuss whether the [getkc id="76" comment="Internet of Things"] will be secure enough, or whether it will create new security issues, with Sami Nassar, general manager of [getentity id="22499" comment="NXP Semiconductor"]; Oleg Logvinov, director for special assignments at [getentity id="22331" comment="STMicroelectronics"]; and Lawrence Loh, application e... » read more

The Week In Review: Design


IP Cadence rolled out a portfolio of stacked die memory verification IP to support Wide I/O-2, Hybrid Memory Cube, high-bandwidth memory, and DDR4-3DS. Included are direct memory access for read, write, save, preload and comparison of memory contents, assertions, error configurability, and a built-in address manager. ARM rolled out additions to its enterprise-class SoC interconnects for qua... » read more

Securing The IoT


Semiconductor Engineering sat down to discuss whether the [getkc id="76" comment="Internet of Things"] will be secure enough, or whether it will create new security issues, with Sami Nassar, general manager of [getentity id="22499" comment="NXP Semiconductor"]; Oleg Logvinov, director for special assignments at [getentity id="22331" comment="STMicroelectronics"]; and Lawrence Loh, application e... » read more

The Week In Review: Design


IP ARM introduced a new software platform and a free operating system aimed at IoT development. The OS incorporates security, communication and device management features for improved energy efficiency. The device server simplifies the connection and management of devices, incorporating security and improving efficiency. Cadence rolled out a broad IP portfolio for TSMC's 16nm platform, and ... » read more

Securing The IoT


Semiconductor Engineering sat down to discuss whether the [getkc id="76" comment="Internet of Things"] will be secure enough, or whether it will create new security issues, with Sami Nassar, general manager of [getentity id="22499" comment="NXP Semiconductor"]; Oleg Logvinov, director for special assignments at [getentity id="22331" comment="STMicroelectronics"]; and Lawrence Loh, application e... » read more

Making Smart Grids Safe


There is little doubt that an intelligent power grid is not only desirable, but necessary in today’s power hungry world. As the global power grid veins its electric tentacles into the farthest reaches of the ecosystem, being able to allocate and monitor what power is needed, where and when will be the model going forward. There are a lot of issues that face the deployment of a smart grid �... » read more

Blog Review: Sept. 24


Cadence’s Brian Fuller captures Chris Rowen’s phylum classifications for data-efficient design—lots of insects and much bigger but fewer mammals. There are cognitive layers in between, as well. Check out the chart. Mentor’s Robin Bornoff digs into thermal runaway and how to determine when it will occur—and burn up a chip. There’s a video to illustrate just what can go wrong. ... » read more

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