The Week In Review: Design

Mentor adds multi-PCB support; Cadence debuts AMS characterization; eSilicon simplifies online quoting; ARM adds integrated graphics; NXP launches auto NFC suite; Synopsys adds sensor and control IP subsystem.


Mentor Graphics rolled out an extension to its PCB design platform that allows for synchronization of processes across multi-board systems. The new tool captures logic and system definitions for boards, cables, backplanes, cable assemblies, sensors and actuators.

Cadence introduced a dynamic characterization solution for mixed signal blocks such as PLLs, data converters, high-speed transceivers and I/Os. The tool characterizes post-layout netlists will parasitic elements faster than divide-and-conquer simulation approaches for accurate SoC signoff.

eSilicon simplified its multi-project wafer and GDSII online quoting system.

ARM uncorked a suite of integrated graphics IP cores for smartphones and tablets that include bandwidth- and power-saving technologies. The strategy is to utilize the most appropriate processor for the best user experience for the least amount of energy, extending a strategy the company started with its big.LITTLE CPU cores.

NXP launched a portfolio of automotive-qualified near-field communications products ranging from tags and transceivers to a high-end NFC controller. The controller supports read-write, peer-to-peer and card emulation modes with low power consumption.

Synopsys rolled out a sensor and control IP subsystem based on the ARC processor for a wide range of ultra-low-power sensor and control applications. It also introduced non-volatile memory IP for TowerJazz‘s 180nm process.  And it added a USB 3.1 device controller IP for storage, digital office and mobile applications.

Cadence unveiled 25G Ethernet verification IP to extend copper cables and backplanes without more interconnect lanes.

Synopsys signed a multi-year OEM agreement with Gowin Semiconductor for FPGA design software. Under the terms of the agreement, Gowin customers will be able to use Synopsys tools to improve synthesis runtimes.

Synopsys said Panasonic achieved five times faster implementation using the newest version of its place-and-route tools.

NXP‘s smart card platform was certified with the highest level of security offered for contactless IC products.

The 2014 Phil Kaufman Award Dinner honoring Lucio Lanza will be held at the San Jose Marriott on Nov. 4. The event is hosted by the EDA Consortium and the IEEE Council on EDA.

ARM’s Tech Symposia will be held from now until Dec. 4 at various locations in Asia/Pacific, Japan and France.

IP-SoC 2014 will be held in Grenoble, France, from Nov. 5-6.

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