RISC-V Verification Challenges Spread

By Ann Mutschler - 22 Dec, 2020 - Comments: 0

The RISC-V ecosystem is struggling to keep pace with rapid innovation and customization, which is increasing the amount of verification work required for each design and spreading that work out across more engineers at more companies. The historical assumption is that verification represents 60% to 80% or more of SoC project effort in terms of cost and time for a mature, mainstream processor... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 11 Dec, 2020 - Comments: 0

Automotive Self-driving car company Cruise now has driverless cars on the streets of San Francisco, Calif., reports the San Francisco Chronicle. Cruise, which is backed by General Motors, is testing five driverless cars in the urban — and very hilly — environment of San Francisco. Cruise is using an EV — the Chevy Bolt — as a test vehicle. At Level 4 driving, the cars will not have a w... » read more

Forward And Backward Compatibility In IC Designs

By Ann Mutschler - 30 Nov, 2020 - Comments: 0

Future-proofing of designs is becoming more difficult due to the accelerating pace of innovation in architectures, end markets, and technologies such as AI and machine learning. Traditional approaches for maintaining market share and analyzing what should be in the next rev of a product are falling by the wayside. They are being replaced by best-guesses about market trends and a need to bala... » read more

Trust Assurance And Security Verification Of Semiconductor IPs And ICs

By OneSpin Solutions - 28 Oct, 2020 - Comments: 0

Connected autonomous vehicles, 5G networks, Internet-of-things (IoT) devices, defense systems, and critical infrastructure use ASIC and FPGA SoCs running artificial intelligence algorithms or other complex software stacks. Vulnerable or tampered ICs can compromise the safety of people and the confidentiality, integrity, and availability of sensitive information. This paper analyzes the trust an... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 23 Oct, 2020 - Comments: 0

Automotive, automation General Motors is planning a third electric-vehicle plant. The former Saturn factory will make first fully electric Cadillac, in the former Saturn assembly line. Tesla is allowing some customers to beta test its Full Self-Driving (FSD), according to The Verge. The company pushed the software update to some early access customers to do some real world beta test. Some o... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 09 Oct, 2020 - Comments: 0

Security A new certification program for hardware verification engineers from Edaptive Computing Inc (ECI) and OneSpin Solutions promises to help companies meet IC integrity standards for SoC designs for 5G, IoT, AI, automotive, industrial, defense, and avionics. These designs are often complex, with a variety of elements, such as programmable logic and different cores. The OneSpin Formal Veri... » read more

System-Level Packaging Tradeoffs

By Ann Mutschler - 30 Sep, 2020 - Comments: 0

Leading-edge applications such as artificial intelligence, machine learning, automotive, and 5G, all require high bandwidth, higher performance, lower power and lower latency. They also need to do this for the same or less money. The solution may be disaggregating the SoC onto multiple die in a package, bringing memory closer to processing elements and delivering faster turnaround time. But ... » read more

Formal Solutions For SystemC/C++ Verification

By OneSpin Solutions - 23 Sep, 2020 - Comments: 0

OneSpin Solutions provides its popular 360 DV formal verification product line, which allows for both the automated checking and full assertion-based verification of SystemC/C++ design representations. This solution extends the verification capability that may be applied to abstract designs, coded in SystemC/C++ for many different use models. This white paper describes the OneSpin solution a... » read more

Is DVFS Worth The Effort?

By Brian Bailey - 10 Sep, 2020 - Comments: 2

Almost all designs have become power-aware and are being forced to consider every power saving technique, but not all of them are yielding the expected results. Moreover, they can add significant complexity into designs, increasing the time it takes to get to tapeout and boosting up the cost. Dynamic voltage and frequency scaling (DVFS) is one such power and energy saving technique now being... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 21 Aug, 2020 - Comments: 0

Pervasive computing — data center, edge, IoT SEMI formed a new standards committee to develop global standards for flexible hybrid electronics (FHE). The SEMI Standards Flexible Hybrid Electronics Global Technical Committee will develop FHE standards for design, materials, manufacturing, packaging and systems and to drive industry growth. IPC is also working on FHE standards as an industry s... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: OneSpin

RISC-V Verification Challenges Spread

Week In Review: Auto, Security, Pervasive Computing

Forward And Backward Compatibility In IC Designs

Trust Assurance And Security Verification Of Semiconductor IPs And ICs

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Auto, Security, Pervasive Computing

System-Level Packaging Tradeoffs

Formal Solutions For SystemC/C++ Verification

Is DVFS Worth The Effort?

Week In Review: Auto, Security, Pervasive Computing