Chip Industry Week In Review


Concerns mount on the use of American-manufactured semiconductors in Russian weapons, with Analog Devices, AMD, Intel and TI set to testify next week before the U.S. Senate Permanent Subcommittee on Investigations. Also, U.S. and other government agencies issued a joint advisory and more details about ongoing Russian military cyberattacks, espionage, and sabotage. The U.S. Commerce Departmen... » read more

Chip Industry Week in Review


The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Achieving Zero Defect Manufacturing Part 2: Finding Defect Sources


Semiconductor manufacturing creates a wealth of data – from materials, products, factory subsystems and equipment. But how do we best utilize that information to optimize processes and reach the goal of zero defect manufacturing? This is a topic we first explored in our previous blog, “Achieving Zero Defect Manufacturing Part 1: Detect & Classify.” In it, we examined real-time defe... » read more

Metrology And Inspection For The Chiplet Era


New developments and innovations in metrology and inspection will enable chipmakers to identify and address defects faster and with greater accuracy than ever before, all of which will be required at future process nodes and in densely packed assemblies of chiplets. These advances will affect both front-end and back-end processes, providing increased precision and efficiency, combined with a... » read more

Driving Cost Lower and Power Higher With GaN


Gallium nitride is starting to make broader inroads in the lower-end of the high-voltage, wide-bandgap power FET market, where silicon carbide has been the technology of choice. This shift is driven by lower costs and processes that are more compatible with bulk silicon. Efficiency, power density (size), and cost are the three major concerns in power electronics, and GaN can meet all three c... » read more

Chip Industry Week In Review


The U.S. Department of Commerce issued a notice of intent  to fund new R&D activities to establish and accelerate domestic advanced packaging capacity. CHIPS for America expects to award up to $1.6 billion in funding innovation across five R&D areas, as outlined in the vision for the National Advanced Packaging Manufacturing Program (NAPMP), with about $150 million per award in each... » read more

Achieving Zero Defect Manufacturing Part 1: Detect & Classify


Whether the discussion is about smart manufacturing or digital transformation, one of the biggest conversations in the semiconductor industry today centers on the tremendous amount of data fabs collect and how they utilize that data. While chip makers are accumulating petabytes of data across the entire semiconductor process, a question arises: how much of that information is being fully uti... » read more

Speeding Up Metrology At Advanced Nodes


Experts at the Table: Semiconductor Engineering sat down to talk metrology at the most advanced nodes and the impact of using different substrates, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; John Hoffman, computer vision engineering manager at Nordson Test & Measurement; and Jiangtao Hu, senior technology director at Onto Inn... » read more

Advanced FTIR Optical Modeling for Hydrogen Content Measurements in 3D NAND Cell Nitride and Amorphous Carbon Hard Mask


Abstract Fourier Transform Infrared spectroscopy offers inline solutions for chemical bonding, epi thickness, and trench depth measurements. Through optical modeling of the transmission or reflectance spectra, information about the electronic structure and chemical composition may be obtained, which can be used for process control and monitoring. In this article, we demonstrate the measurement... » read more

3D Metrology Meets Its Match In 3D Chips And Packages


The pace of innovation in 3D device structures and packages is accelerating rapidly, driving the need for precise measurement and control of feature height to ensure these devices are reliable and perform as expected throughout their lifetimes. Expansion along the z axis is already well underway. One need look no further than the staircase-like 3D NAND stacks that rise like skyscrapers to p... » read more

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