Why RISC-V Is Succeeding

By Brian Bailey - 24 Feb, 2022 - Comments: 5

There is no disputing the excitement surround the introduction of the RISC-V processor architecture. Yet while many have called it a harbinger of a much broader open-source hardware movement, the reasons behind its success are not obvious, and the implications for an expansion of more open-source cores is far from certain. “The adoption of RISC-V as the preferred architecture for many sili... » read more

Open Source Hardware Risks

By Ann Mutschler - 08 Jan, 2020 - Comments: 0

Open-source hardware is gaining attention on a variety of fronts, from chiplets and the underlying infrastructure to the ecosystems required to support open-source and hybrid open-source and proprietary designs. Open-source development is hardly a new topic. It has proven to be a successful strategy in the Linux world, but far less so on the hardware side. That is beginning to change, fueled... » read more

Taking Steps Toward Hybrid Memory

By Ken Wright - 13 Dec, 2018 - Comments: 0

What is the memory subsystem of the future, and how do we get there? Since our Hybrid Memory research program began, Rambus Labs and its industry partners and collaborators have made significant progress under the banner of OpenPOWER and OpenCAPI Foundations, an open development community based on the POWER microprocessor (mP) architecture. Rambus Labs is using the Wistron POWER9 systems’ Ope... » read more

CPU, GPU, or FPGA?

By Jeff Dorsch - 16 Jun, 2016 - Comments: 0

Nvidia’s new GeForce GTX 1080 gaming graphics card is a piece of work. Employing the company’s Pascal architecture and featuring chips made with a 16nm [getkc id="185" kc_name="finFET"] process, the GTX 1080’s GP104 graphics processing units boast 7.2 billion transistors, running at 1.6 GHz, and it can be overclocked to 1.733 GHz. The die size is 314 mm², 21% smaller than its GeForce ... » read more

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Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

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Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

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Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: OpenPOWER

Why RISC-V Is Succeeding

Open Source Hardware Risks

Taking Steps Toward Hybrid Memory

CPU, GPU, or FPGA?

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