tag: Oracle

Chip Industry Week In Review
By The SE Staff - 04 Oct, 2024 - Comments: 0

Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Chip Industry Week In Review
By The SE Staff - 27 Sep, 2024 - Comments: 0

Global spending on 300mm fab equipment is expected to reach a record US$400 billion from 2025 to 2027, according to SEMI. Key drivers are the regionalization of semiconductor fabs and the increasing demand for AI chips in data centers and edge devices, with China, South Korea, and Taiwan leading the way. The Biden-Harris Administration launched the National Semiconductor Technology Center’... » read more

Building Smarter, Better Fabs
By Laura Peters - 15 Aug, 2024 - Comments: 0

Battling labor shortages, faster ramp rates, and data overload, the process of designing and building greenfield fabs requires a combination of tech tools, failing earlier approaches and superior planning from day one. The complexity and scale of semiconductor fabs is skyrocketing as is the capital cost. Chipmakers are looking to ramp multibillion dollar fabs faster despite the hurdles of la... » read more

Week In Review: Design, Low Power
By Linda Christensen - 24 Mar, 2023 - Comments: 0

Renesas will acquire Panthronics, a fabless semiconductor company specializing in high-performance wireless products, expanding its reach into near-field communications for financial, IoT, asset tracking, wireless charging, and automotive applications. The two companies already had collaborated on designs for mobile point-of-sale terminals, wireless charging, and smart metering. Renesas also... » read more

Improving Concurrent Chip Design, Manufacturing, And Test Flows
By Ann Mutschler - 28 Nov, 2022 - Comments: 0

Semiconductor design, manufacturing, and test are becoming much more tightly integrated as the chip industry seeks to optimize designs using fewer engineers, setting the stage for greater efficiencies and potentially lower chip costs without just relying on economies of scale. The glue between these various processes is data, and the chip industry is working to weave together various steps t... » read more

Week In Review: Design, Low Power
By Jesse Allen - 22 Apr, 2022 - Comments: 0

Tools & IP Synopsys unveiled a new neural processing unit (NPU) IP and toolchain. DesignWare ARC NPX6 NPU IP scales from 4K to 96K MACs with power efficiency of 30 TOPS/Watt. A single instance offers 250 TOPS at 1.3 GHz on 5nm processes in worst-case conditions, or up to 440 TOPS by using new sparsity features, which can increase the performance and decrease energy demands of executing a n... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 20 Nov, 2020 - Comments: 0

Pervasive computing — Data centers, cloud, 5G, edge In a move to improve data collection for IC manufacturing, PDF Solutions entered a definitive agreement to acquire Cimetrix Incorporated. Cimetrix makes connectivity products for smart manufacturing, which PDF Solutions will use in its Exensio product to facilitate moving IC manufacturing data from the factory floor to cloud-based analytics... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 23 Oct, 2020 - Comments: 0

Chipmakers AMD and Xilinx have entered into a definitive agreement for AMD to acquire Xilinx in an all-stock transaction valued at $35 billion. With the proposed deal, AMD will enter the FPGA business, putting it further in competition with Intel. The transaction has been unanimously approved by the AMD and Xilinx boards. The transaction is expected to close by the end of calendar year 2021. U... » read more

Week in Review – IoT, Security, Autos
By Jeff Dorsch - 04 Oct, 2019 - Comments: 0

Products/Services Cadence Design Systems is working with Adesto Technologies to grow the Expanded Serial Peripheral Interface (xSPI) communication protocol ecosystem, for use in Internet of Things devices. The Cadence Memory Model for xSPI allows customers to ensure optimal use of the octal NOR flash with the host processor in an xSPI system, including support for Adesto’s EcoXiP octal xSPI ... » read more

Solving The Memory Bottleneck
By Brian Bailey - 04 Oct, 2019 - Comments: 4

Chipmakers are scrambling to solve the bottleneck between processor and memory, and they are turning out new designs based on different architectures at a rate no one would have anticipated even several months ago. At issue is how to boost performance in systems, particularly those at the edge, where huge amounts of data need to be processed locally or regionally. The traditional approach ha... » read more

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