tag: packaging

Package Integrated Vapor Chamber Heat Spreaders
By Sanghyuk Kim - 21 Mar, 2024 - Comments: 0

With continuous increases in computational demand in nearly all electronics market segments, even historically lower power packaging is being driven into challenging thermal management situations. Node shrink alone is reaching a limit in maintaining track with Moore’s law. The economics and yield challenges of large monolithic system on chip (SoC) designs are driving the development of silico... » read more

Electromigration Performance Of Fine-Line Cu Redistribution Layer (RDL) For HDFO Packaging
By JiHye Kwon - 18 Jan, 2024 - Comments: 0

The downsizing trend of devices gives rise to continuous demands of increasing input/output (I/O) and circuit density, and these needs encourage the development of a High-Density Fan-Out (HDFO) package with fine copper (Cu) redistribution layer (RDL). For mobile and networking application with high performance, HDFO is an emerging solution because aggressive design rules can be applied to HDFO ... » read more

High Performance, Multi-Chip Leadframe Package With Internal Connections
By DaeYoung Park - 19 Dec, 2023 - Comments: 0

For high performance applications, demand for highly integrated packages has increased. This is due to the highly integrated package’s electrical performance advantages of reduction of interchip distance (delay), high density I/O counts for multi-function and small form factor [1-3]. With the increasing importance of highly integrated packages, the need for improved thermal management is also... » read more

Fluid Dispensing For Packaging Today’s Devices
By Nordson Test And Inspection - 12 Dec, 2023 - Comments: 0

Fluid dispensing systems are evolving in order to address the challenges that system-in-package (SiP) and micromechanical systems (MEMS) packages face, especially in regard to tight geometries and assembly processes. These packages, used in smartphones, have become more miniaturized, and as a result, have created added value in the market. However, they include a variety of small dies or dev... » read more

Semiconductor Device Manufacturing Process Challenges And Opportunities
By Andreas Bier - 07 Dec, 2023 - Comments: 0

Semiconductor device manufacturing involves a complex series of processes that transform raw materials into finished devices. The process typically involves four major stages: wafer fabrication, wafer testing, assembly or packaging, and final testing. Each stage has its own unique set of challenges and opportunities. The semiconductor device manufacturing process faces several challenges, inclu... » read more

The Good Old Days Of EDA
By Brian Bailey - 30 Nov, 2023 - Comments: 5

Nostalgia is wonderful, but there is something about being involved in the formative years of an industry. Few people ever get to experience it, and it was probably one of the most fortuitous events to have happened in my life. Back in the early '80s, little in the way of design automation existed. There were a few gate- and transistor-level simulators, primarily for test and a few 'calculators... » read more

LAB Flip Chip Reflow Process Robustness Prediction By Thermal Simulation
By Gabriel Chang - 16 Nov, 2023 - Comments: 0

By Gabriel Chang and Ricky Zang Nowadays, there are many interconnects in IC chips. One of the packaging goals is to connect an IC to the next level of subsystem circuitry (package substrates/print circuit boards). Mass reflow (MR) of solder joints is a widely adapted and stable process in the industry. The applications of MR include flip chip, ball mounting, surface mount technology (SMT), ... » read more

Making Connections In 3D Heterogeneous Integration
By Ann Mutschler - 26 Oct, 2023 - Comments: 0

Activity around 3D heterogeneous integration (3DHI) is heating up, driven by growing support from governments, the need to add more features and compute elements into systems, and a widespread recognition that there are better paths forward than packing everything into a single SoC at the same process node. The leading edge of chip design has changed dramatically over the last few years. Int... » read more

Reverse Laser Assisted Bonding (R-LAB) Technology For Chiplet Module Bonding On Substrate
By SeokHo Na - 21 Sep, 2023 - Comments: 0

By SeokHo Na, MinHo Gim, GaHyeon Kim, DongSu Ryu, DongJoo Park, and JinYoung Kim In the recent semiconductor market, there are many applications including smartphone, tablets, central processing units (CPUs), artificial intelligence (AI), data cloud and more that are expecting and experiencing rapid growth. As most of these applications require high performance, single-die Flip Chip packages... » read more

3D In-Memory Compute Making Progress
By Katherine Derbyshire - 17 Aug, 2023 - Comments: 0

Indium compounds are showing great promise for 3D in-memory compute and RF integration, but more work is needed. Researchers continue to make headway into 3D device integration particularly with indium tin oxide (ITO), which is widely used in display manufacturing. Recent work indicates that different compounds of indium oxide doped with tin, gallium, or zinc combinations may boost transisto... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy