Redefining A System…And Why It Matters

By Ed Sperling - 23 Oct, 2014 - Comments: 0

The concept of a system on chip has been around since the mid-1990s, but the actual mass implementation of this scheme is almost synonymous with the rise of the smart phone over the past decade. Put in perspective, it isn't that old, and it's about to change. Prior to the [getkc id="81" kc_name="SoC"], an electronic system was largely a collection of components on a PCB that included memory,... » read more

EDA Sales Up Again

By Ed Sperling - 01 Apr, 2014 - Comments: 0

EDA continued to post strong growth, setting records as an industry and proving the resilience of the tools industry, which has been showing positive numbers for 16 consecutive quarters. Revenue for Q4 of 2013 were $1.881 billion, up from $1.779 billion in the same period in 2012, according to numbers provided by the EDA Consortium. For the year, revenue hit $6.932 billion, up 6.1% from annu... » read more

The Week In Review: Design

By Ed Sperling - 27 Mar, 2014 - Comments: 0

Tools Synopsys rolled out a major new release of its place and route tool, the centerpiece of its physical design platform, offering up to 10X improvement in speed—a combination of 5X faster implementation and 2X larger capacity. Co-CEO Aart de Geus called it the most significant product in the company’s history. Synopsys also rolled out an AMS verification platform to accelerate regres... » read more

How A Team-Based Approach To PCB Power Integrity Analysis Yields Better Results

By Various Writers - 12 Feb, 2014 - Comments: 0

Assuring power integrity of a PCB requires the contributions of multiple design team members. Traditionally, such an effort has involved a time-consuming process for a back-end-focused expert at the front end of a design. This paper examines a collaborative team-based approach that makes more efficient use of resources and provides more impact at critical points in the design process. To vie... » read more

Challenges In IC And Electronic Systems Verification

By Aveek Sarkar - 11 Apr, 2013 - Comments: 0

By Aveek Sarkar Designing successful electronic systems that can meet the needs of a challenging and quickly evolving mobile market requires design teams to solve critical problems such as power efficiency, unrealistic schedules, and cost-down considerations. In this first of a three-part series, we will look at these challenges. Part 1: The Growing Challenges Designing electronic systems ... » read more

What’s Ahead For System-Level Design

By Ed Sperling - 19 Dec, 2012 - Comments: 0

By Ann Steffora Mutschler Architecting an SoC today is incredibly difficult. When you add in the number of available transistors, the manufacturing effects of smaller nodes, IP and software that must be integrated, among other things, the challenges just keep mounting. Depending on what market segment the SoC will be designed into has a huge impact, as well. “It is impossible to ove... » read more

Smarter Co-design With Models

By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ann Steffora Mutschler IC, package and PCB co-design methodologies are starting to be adopted by semiconductor companies. However, the existing die abstract file used in these flows to exchange data between the IC designer and the downstream package design team may not contain enough detail to drive advanced planning and optimization with the package and PCB interfaces. Engineering teams... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer